參數(shù)資料
型號(hào): L6717
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: DUAL SWITCHING CONTROLLER, 575 kHz SWITCHING FREQ-MAX, QCC48
封裝: 7 X 7 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFQFPN-48
文件頁(yè)數(shù): 28/56頁(yè)
文件大?。?/td> 1081K
代理商: L6717
Output voltage positioning
L6717
34/56
Doc ID 17326 Rev 1
7
Output voltage positioning
Output voltage positioning is performed by selecting the controller operative-mode (SVI, PVI
and V_FIX) and by programming the droop function and offset to the reference of both the
sections (See Figure 9). The controller reads the current delivered by each section by
monitoring the voltage drop across the DCR Inductors. The current (IDROOP / IDROOP_NB)
sourced from the FB / NB_FB pin, directly proportional to the read current, causes the
related section output voltage to vary according to the external RFB / RFB_NB resistor so
implementing the desired load-line effect.
L6717 embeds a dual remote-sense buffer to sense remotely the regulated voltage of each
Section without any additional external components. In this way, the output voltage
programmed is regulated compensating for board and socket losses. Keeping the sense
traces parallel and guarded by a power plane results in common mode coupling for any
picked-up noise.
Figure 9.
Voltage positioning
1.2V
ROS
SCL/OS
CORE_REFERENCE
FB
COMP
VSEN
FBG
RF
CF
RFB
To VDD_CORE
(Remote Sense)
k
DRP
I DR
OOP
-I
OS
I OS
CORE Protection
Monitor
from SVI DAC...
NB_REFERENCE
NB_FB
NB_COMP
NB_VSEN
NB_FBG
RF_NB
CF_NB
RFB_NB
To VDD_NB
(Remote Sense)
k
DRPNB
I DR
OOP_NB
NB Protection
Monitor
from DAC...
CORE
SECTION
V
O
LT
A
GE
POSITIONING
NB
SECTION
V
O
LT
A
GE
POSITIONING
Operative only when Power Manager I2C disabled
Offset from Power Manager I2C
(Active when enabled)
Clamp to 2.8V
max
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