參數資料
型號: L6245
廠商: 意法半導體
英文描述: 5V HARD DISK DRIVE POWER COMBO
中文描述: 5V的硬盤驅動器電源組合
文件頁數: 9/15頁
文件大?。?/td> 191K
代理商: L6245
FUNCTIONAL DESCRIPTION
Inside the system is the sensorlessSpindle driver
(Spin), the Voice Coil Motor driver (VCM), the
Head load/unload predrivers, power sequencing,
actuator over-velocity detection, actuator retrac-
tion and dynamic braking. The architecture of the
system is configured to interface directly to an 8
bit, parallel,microprocessor bus.
During the application of power to the system
(power-on),the outputdrivers are heldin a disabled
state until the applied voltage reaches the Voltage
Good Threshold (VGT). During this period of time
the output drivers are disabled, the internal register
are set to predetermined states,and the Power On
Reset (POR) signal is held low. The POR signal is
held low from the time the applied voltage
reaches 0.7V and the VGT. The POR delay is
programmable changing the value of a capacitor.
The VCM driver is driven via a D/A and it can be
enabled through the VCM driver register. The
VCM driver has a gain capability too. This func-
tion is to be accomplishedby switching the sense
resistor used such that the current sensing feed-
back in the VCM driver has more information and
therefore results in lower deadband, offset cur-
rent, and gain error. An actuator over velocity
sensing circuit is incorporated in the system,
which is accomplished by measuring BEMF volt-
age and comparing to a threshold.
ELECTRICALCHARACTERISTICS
(Continued)
Step-upconverter
Symbol
V
SU
Microprocessorinterface
(Note10)
Parameter
TestCondition
Min.
7
Typ.
Max.
11
Units
V
Step-up Voltage
Relative to V
CC
Symbol
V
IH
V
IL
V
OH
V
OL1
Parameter
TestCondition
Min.
3
Typ.
Max.
Units
V
V
V
V
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
0.8
VCC = 5V, I
OH
= 400
μ
A
–MCERR, –POR, –DTACK
IOL = 4mA
SYNT_ALL
IOL = 0.5mA
–RD, –WR, AS, –MC_CS,
SYSCLK, A [0:2]
D [0:7]
4.4
0.4
V
OL2
Low Level Output Voltage
0.4
V
I
IN1
Input Leakage Current
1
μ
A
I
IN2
Input Leakage Current
10
μ
A
Microprocessorinterface timing
Trddh
Trddt
Twrdt
Read Data Hold
–RD High to –DTACK high
–WR High to –DTACK High
5
40
40
40
ns
ns
ns
Power on reset
V
CCHL
V
CCHL
T
PLH
R
T
V
CC
Good, HL
V
CC
Good, LH
Rise Time
Response Time
V
CC
falling
V
CC
rising
C
Load
= 100pF
4.2
4.26
4.4
4.5
200
50
V
V
ns
μ
s
Notes:
1) The minimum voltage available from thebrushless DC motor after power has beenremoved is 2.7V
2) The voltageavailable for actuator etraction shall be greater than 0.7V.
3) Sum of I
(V
/internal resistor + power leakage).
4) Minimum outputvoltage is setto V
by a resistornetwork.
5) The VCM DAC shallbe monotonic over its full range.
6) The coding of the digital input shall be 2’s complement.
7) The voltageavailable for solenoid operation shall be greater than 1.9V.
8) The Spin DAC shall be monotonic over its full range.
9) The coding of the digital input shall be uniplar (unsigned binary).
10) SYNTH_HALL, MC_ERR, DTACKand POR shall have open drain (collector)outputs and internal pull-up resistors. The minimum value of
these pull-up resistors shall be 20K
..
L6245
9/15
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