![](http://datasheet.mmic.net.cn/370000/L6237_datasheet_16703395/L6237_6.png)
way the outputs are in tristate condition, and
since no brake is applied to the motor, it will con-
tinue its rotation, giving a BEMF voltage propor-
tional to its speed. The low transition at BRKinput
will also produce a delayed negative transition at
the BRK_DLY input. This delay is configurableby
connecting a capacitor and resistor from the
BRK_DLY pin to ground. The negative transition
at this pin will initiate the braking of the motor by
turning on all lower DMOS, keeping all upper
DMOS turned off. This feature provides a time in-
terval where the motor acts as a generator,
whose BEMF can
be used to
Read/Write Parking function. As soonas the head
has been parked, the motor can be really braked,
stopping its rotation in a very short time. The
brake function utilizes the energy stored in an ex-
ternal capacitor to turn on or off the DMOS pow-
ers. This allows the braking procedure even if the
Vp supply has been powered down. Additionally,
while in brakemode, part of the analog circuitry is
turned off and the quiescent current is minimized.
This is useful in battery operated sistems when
disk access is minimal. An immediate brake can
be realized by simultaneously driving RESET and
CLOCK high, and MUX_SGL low. This will turn
off the upper drivers turning on the lower drivers.
Braking occurs regardless of the condition of the
BRK_DLYinput.
Motor current is determined by a voltageimposed
on the VIN input. The SENSE pins are intended
for connection of a resistor in series with the
source of all lower DMOS. The voltage at this pin
provides the feedback signal which is utilized in-
ternally to regulate the motor current. This one
can be determined by the expression Imotor =
Vin/K*Rsense where K is the voltage gain of the
sense amplifier. A value of 4 or 16 is selectable
by the GAIN logic input. The current is regulated
by a linear transconductance loop which drives
the lower DMOS. The control is passed to each
lower DMOS in succession during the commuta-
tion sequence.
To avoid recirculation of the current flowing in the
coils of the motor when each phase is commu-
tated, the turn off slew rate of the upper an lower
drivers is externally configurable using a single
resitor. This defines a current that is internally
used to discharge a capacitor. The profile of the
voltageacross this capacitor will be reproduced at
the output, performing the slew rate control. Be-
cause of this control the current flowing in the
switched off coil will decrease to zero with
quadratic slope, while the total current in the mo-
tor is kept constantby the transconductanceloop.
Thermal protection circuitry will shut off all drivers
when the chip junction temperature exceeds the
threshold temperature. A small amount of hyster-
esis is included to prevent rapid on/off cycling of
the power stages.
CIRCUIT OPERATION AND FORMULAS
power the
a
BRAKEDELAY
The amount of time that a signal transition takes
to propagate from BRK to BRK_DLY pins can be
determinedby the espression
Td
1.5
RC
where R and C are the values of the resistor an
capacitor connected to BRK_DLY pin. With the
above expression the value of Td is expressed in
milliseconds.
[ms]
TRANSCONDUCTANCE LOOP GAIN
The transconductanceis given by the expression:
Gm = 1/(K
Rsense)
Where K can be 4 or 16 depending on the state
of pin GAIN. If GAIN=0, K=4; if GAIN=1, K=16. As
a result the total current flowing in the motor is:
Im = Gm
Vin = Vin/(K
Rsense)
where Vin is the voltageapplied to pin V
IN
.
SLEW RATE CONTROL
By means of an external resistor it is possible to
configure the turn off slew rate following this ex-
pression:
SR = 15/Rslew(K
)
Rslew is the resistor connected to pin SLEW and
its value is espressed in Kohms, while the SR
valuewill be V/
μ
s.
[V/
μ
s]
DIGITAL BEMF MASKING: THEORY OF OP-
ERATION
A 9 bit up counter is used to measure the period
between to successive zero crossings. This ”pe-
riod
counter”
counts
FREF/2E6 = FREF/64. When a new zero crossing
is detected, the period counter will transfer its
contentsto the 6 bit down counter that is the real
”mask counter”.
The up counter will then reset to zero and com-
mence the counting of the following period. Since
that the mask counter uses a frequency that is
FREF/2E7 = FREF/128, that is half of the fre-
quency used by the up counter, the final masking
time will be one fourth of the period between to
successive zero crossings or, in other terms, 15
electrical degrees.
During start up, whenthe period is quitelarge, the
period counter will saturate when all bit are in ”1”
state, providing a maximum mask interval. As the
motor speed increases, a fixed masking time will
be applieduntil the period between two commuta-
tions is less than the maximum time of the period
counter.
This means that the masking time will be propor-
tional for commutations period that are less than
a
frequency
that
is
L6237
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