參數(shù)資料
型號: L4969
廠商: 意法半導(dǎo)體
英文描述: SYSTEM VOLTAGE REGULATOR WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER
中文描述: 系統(tǒng)電壓調(diào)節(jié)器容錯低速的CAN收發(fā)器
文件頁數(shù): 23/35頁
文件大?。?/td> 337K
代理商: L4969
23/35
L4969
Figure 17.
After power-on-reset of VS and V1 or wakeup from Sleep or NRESET being forced low externally, the Startup
Watchdog is active, supervising the proper startup of the V1 supplied uC. Upon missing SPI write operation to
the WDC register after 7 reset cycles (1ms active, 320ms high) the Sleep mode is entered.
Leaving the forced Sleep mode will be automatically performed upon wakeup via CAN, an edge on WAKE or
upon device powerup.
After successful startup, the Window Watchdog supervision is activated, meaning, that the uC has to send an
acknowledge within a predefined, programmable window.
Upon failure, a reset is generated and the Startup Watchdog is reactivated.
If the Timer function is requested, the window watchdog is deactivated until expiry of the wakeup time, or rewrit-
ing of this register. Note, that any write to this register will reset the timer.
2.5.2 Startup
Figure 18.
After powerup, the L4969 is expecting the uC to send an acknowledgement within a predefined segmented tim-
ing frame of 7 x 320ms. A missing acknowledgement until after the 2.3s will force the device into sleep mode
until either external or CAN wakeup or POR cause a restart of the sequence above.
2.5.3 Window Watchdog
Startup
Wd
Window
Wd
Wakeup
Timer
Forced
Sleep
Ack
Ack
missing
Ack
WR & WDEN
Timeout
WR
missing Ack
(after 350ms)
ExtWake
CAN-Wake
POR
Prog
Sleep
Wakeup
NRESET
forced low
externally
Note: WR, writing to this address, will restart the timer
V1
NRESET
NRESET
NRESET
Startup Acknowledgement via SPI within 320ms
Startup Acknowledgement via SPI within 640ms
No Startup Acknowledgement via SPI within 2.3s (Device will enter Sleep mode)
1ms
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