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參數(shù)資料
| 型號： | L4969 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SYSTEM VOLTAGE REGULATOR WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER |
| 中文描述： | 系統(tǒng)電壓調(diào)節(jié)器容錯(cuò)低速的CAN收發(fā)器 |
| 文件頁數(shù)： | 19/35頁 |
| 文件大?。?/td> | 337K |
| 代理商： | L4969 |
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19/35
L4969
2
The functionality of the device can be observed and controlled through a set of registers which are read and
writable by the serial interface.
CONTROL AND STATUS REGISTERS
2.1
Figure 11.
ADR 0: VRCR Voltage Regulator Control Register
Note, that when using the Undervoltage-detection, EUV2 and EUV3 have to be activated
AFTER
V2 or V3 have
been turned on and settled (t > 1ms). Otherwise unwanted undervoltage can be detectected during turn on of
the corresponding voltage regulator.
TRC
Disable all Regulators (Go to Sleep)
Note, that at least one Wakeup Source
without a pending wakeup is required
Enable Regulator #3 .
V3 will be activated by either setting ENV3 or
upon enabling of the CAN Lineinterface
Default value is ‘0’ (disabled)
This bit will be automatically reset upon
Overtemperature from CANIF or Regulator #3
Enable Regulator #2.
Default value is ‘0’ (disabled)
This bit will be automatically reset upon
Overtemperature at Regulator #2.
Enable Regulator #2 tracking option
to have V2 following V1 with constant offset
Default value is ‘0’ (disabled)
RES
RTC0
Set reset threshold value to 4.0V
Default value is ‘0’ (4.5V)
EUV2
EUV3
ENV3
ENV2
DISAR
Has to be
written as ‘0’.
D7
D0
DISAR
V1
V3
(DISAR & ENV3 |
ACT) & TSDV3
TRC
V2
DISAR & ENV2
to enable access.
This bit will be automatically set upon
the system failures Overtemperature V1
or watchdog startup failure.
Enable undervoltage
detection on
Regulator #2 and #3
(see note below)
REF
Note
, that due to the large initial charging current of the output capacitors,
the activation of V2 AND V3 within the same command is not recommended
also leaving ENV2 or ENV3 set when setting DISAR can therefor not be
recommended (after wakeup V1 AND V2 or V3 would be turned on)
DISAR will be cleared upon a valid
wakeup signal which is either defined
in GIEN or is forced to WAKE or CAN
after a system failure
V3 will be activated upon VRCR.ENV3 or
CCTR.ACT without pending thermal shutdown
Note, that no reset will be generated
from low V1 during Sleep mode transition
The Reset line has to be forced low
externally, or through a window failure
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| L4969D013TR | 功能描述:線性穩(wěn)壓器 - 標(biāo)準(zhǔn) Triple w/Lo-Spd Tran RoHS:否 制造商:STMicroelectronics 輸出類型: 極性: 輸出電壓:1.8 V 輸出電流:150 mA 負(fù)載調(diào)節(jié): 最大輸入電壓:5.5 V 線路調(diào)整率: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-323-5L |
| L4969MD | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SYSTEM VOLTAGE REGULATOR WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER |
| L4969UR | 功能描述:線性穩(wěn)壓器 - 標(biāo)準(zhǔn) BODY SMARTPOWER RoHS:否 制造商:STMicroelectronics 輸出類型: 極性: 輸出電壓:1.8 V 輸出電流:150 mA 負(fù)載調(diào)節(jié): 最大輸入電壓:5.5 V 線路調(diào)整率: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-323-5L |
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