參數(shù)資料
型號(hào): L4969
廠商: 意法半導(dǎo)體
英文描述: SYSTEM VOLTAGE REGULATOR WITH FAULT TOLERANT LOW SPEED CAN-TRANSCEIVER
中文描述: 系統(tǒng)電壓調(diào)節(jié)器容錯(cuò)低速的CAN收發(fā)器
文件頁數(shù): 12/35頁
文件大?。?/td> 337K
代理商: L4969
L4969
12/35
1.3.2 Negligible Errors
1.3.2.1
Transmitter
Error I and II (CANH or CANL interrupted but still tied to termination)
Error IV and VIII (CANH or CANL permanently dominant by short circuit)
In all cases above data can still be transmitted in differential mode.
1.3.2.2
Receiver
Error I and II (CANH or CANL interrupted but still tied to termination)
Error V and IX (CANH or CANL permanently recessive by short circuit)
In all cases above data can still be received in differential mode.
1.3.3
Problematic Errors
1.3.3.1
Transmitter
Error III and VI (CANH or CANL show overvoltage condition by short circuit)
Data is transmitted using the remaining dataline (single wire)
1.3.3.2
Receiver
Error III and VI (CANH or CANL show overvoltage condition by short circuit)
Data is received using the remaining dataline (single wire)
1.3.4 Severe Errors
1.3.4.1
Transmitter
Error V and IX (CANH or CANL permanently recessive by short circuit)
Data is transmitted on the remaining dataline after short circuit detection
Error VII (CANH is shorted to CANL)
Data is transmitted on CANH or CANL after overcurrent was detected
Error X (attempt to transmit more than 10 successive dominant bits (at lowest bitrate specified)
Transmission is terminated (fail safe)
1.3.4.2
Receiver
Error VII (CANH is shorted to CANL)
Data is received on CANH or CANL after detection of permanent dominant state
Error IV and VIII (CANH or CANL permanently dominant by short circuit)
Data is received on CANH or CANL after short circuit was detected
Error X (reception of a sequence of dominant bits, violating the protocol rules)
Data is received normally, error is detected by protocol-unit
The error conditions is signaled issuing an error flag inside a dedicated register which is readable by the
μ
C
through the serial interface. The information of the error type (I through X) is also stored into this register.
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