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參數(shù)資料
| 型號(hào)： | KT8554B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 元件分類： | Codec |
| 英文描述： | 1 Chip Codecs(編解碼器) |
| 中文描述： | 1芯片解碼器（編解碼器） |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 136K |
| 代理商： | KT8554B |
KT8554B/7B 1 CHIP CODECS
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
(Ta = 25
o
C)
Pin No
Symbol
Description
1
V
BB
V
BB
= -
5V
±
5%.
2
GNDA
Analog ground.
3
VF
R
O
Analog output of the receive power Amp.
4
V
CC
V
CC
= +5V ± 5%.
5
FS
R
Receive frame sync pulse. 8KHz pulse train.
6
D
R
PCM data input.
7
Logic input which selects either 1.536MHz/1.544MHz or 2.048MHz for master
clock in normal operation and BCLK
X
is used for both TX and RX directions.
Alternately direct clock input available, very from 64KHz to 2.048MHz.
When MCLK
R
is connected continuously high, the device is powered down.
Normally connected continusously low, MCLK
X
is selected for all DAC timing.
Alternately direct 1.536MHz/1.544MHz or 2.048MHz clock input available.
8
9
MCLK
X
Must be1.536MHz/1.544MHz or 2.048MHz.
May be vary from 64KHz to 2.048MHz but BCLK
X
is externally tied with MCLK
X
in normal operation.
11
D
X
PCM data output.
12
FS
X
TX frame sync pulse. 8KHz pulse train.
13
TS
X
Changed from high to low during the encoder timeslot. Open drain output.
Analog output of the TX input amplifier.
Used to set gain through external resistor.
15
VF
X
I
-
VF
X
I
+
Inverting input stage of the TX analog signal.
16
Non-inverting input stage of the TX analog signal.
Characteristic
Symbol
Value
Unit
Positive Supply Voltage
V
CC
V
BB
V
I
(A)
V
l
(D)
Ta
7
V
Negative Supply Voltage
- 7
V
Voltage at Any Analog Input or Output
V
CC
+ 0.3 to V
BB
- 0.3
V
CC
+ 0.3 to GNDA - 0.3
- 25 to + 125
V
Voltage at Any Digital Input or Output
V
Operating Temperature Range
o
C
Storage Temperature Range
T
STG
T
LEAD
- 65 to + 150
o
C
Lead Temperature (Soldering, 10 secs)
300
o
C
10
BCLK
X
BCLK
/
CLKSEL
MCLK
R
/
PDN
GS
X
14
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