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參數(shù)資料
| 型號： | KSZ9021RNI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 52/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 10/100/1000 SGL 48QFN |
| 標準包裝： | 260 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 8/8 |
| 規(guī)程： | 千兆位以太網 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 48-QFN（7x7） |
| 包裝： | 托盤 |
| 配用： | 576-3874-ND - BOARD EVALUATION FOR KSZ9021RN |
| 其它名稱： | 576-3978 KSZ9021RNI-ND |
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MCP444X/446X
DS22265A-page 56
2010 Microchip Technology Inc.
6.2.4
ADDRESSING
The address byte is the first byte received following the
START condition from the master device. The address
contains four (or more) fixed bits and (up to) three user
defined hardware address bits (pins A1 and A0). These
7-bits address the desired I2C device. The A6:A2
address bits are fixed to “01011” and the device
appends the value of following two address pins (A1
and A0).
Since there are address bits controlled by hardware
pins, there may be up to four MCP44XX devices on the
same I2C bus.
Figure 6-9 shows the slave address byte format, which
contains the seven address bits. There is also a read/
write (R/W) bit. Table 6-2 shows the fixed address for
device.
Hardware Address Pins
The hardware address bits (A1, and A0) correspond to
the logic level on the associated address pins. This
allows up to eight devices on the bus.
These pins have a weak pull-up enabled when the VDD
< VBOR. The weak pull-up utilizes the “smart” pull-up
technology and exhibits the same characteristics as the
High-voltage tolerant I/O structure.
The state of the A0 address pin is latch on POR/BOR.
This is required since High Voltage commands force
this pin (HVC/A0) to the VIHH level.
FIGURE 6-9:
Slave Address Bits in the
I2C Control Byte.
TABLE 6-2:
DEVICE SLAVE ADDRESSES
6.2.5
SLOPE CONTROL
The MCP44XX implements slope control on the SDA
output.
As the device transitions from HS mode to FS mode,
the slope control parameter will change from the HS
specification to the FS specification.
For Fast (FS) and High-Speed (HS) modes, the device
has a spike suppression and a Schmidt trigger at SDA
and SCL inputs.
Device
Address
Comment
MCP44XX ‘0101 1’b + A1:A0
Supports up to 4
devices. (Note 1)
Note 1:
A0 is used for High-Voltage commands
(HVC/A0) and the value is latched at
POR/BOR.
S A6A5 A4 A3A2 A1 A0 R/W
A/A
Start
bit
Slave Address
R/W bit
A bit (controlled by slave device)
R/W
= 0 = write
R/W
= 1 = read
A
= 0 = Slave Device Acknowledges byte
A
= 1 = Slave Device does not Acknowledge byte
“0” “1” “0” “1”
See Table 6-2
“1”
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| KSZ9031MNX | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:The KSZ9031MNX is a completely integrated triple-speed (10Base-T/100Base-TX/1000Base-T) Ethernet physicallayer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable. |
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| KSZ9031MNXCA TR | 功能描述:以太網 IC 1-Port Gigabit Ethernet PHY RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ9031MNXCA-TR | 功能描述:4/4 Transceiver Full Ethernet 64-QFN (8x8) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 類型:收發(fā)器 協(xié)議:以太網 驅動器/接收器數(shù):4/4 雙工:全 接收器滯后:- 數(shù)據速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-VFQFN 裸露焊盤 供應商器件封裝:64-QFN（8x8） 標準包裝:1 |
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