
KS8995XA
Table of Contents
System Level Applications..............................................................................................................................................................
6
Pin Description (by Number)...........................................................................................................................................................
8
Pin Description (by Name) ............................................................................................................................................................
13
Pin Configuration ...........................................................................................................................................................................
18
Introduction
Functional Overview: Physical Layer Transceiver.....................................................................................................................
19
100BASE-TX Transmit ............................................................................................................................................................ 19
100BASE-TX Receive ............................................................................................................................................................. 19
PLL Clock Synthesizer ............................................................................................................................................................ 19
Scrambler/De-scrambler (100BASE-TX only) ......................................................................................................................... 19
100BaseFX Operation ............................................................................................................................................................. 19
100BaseFX Signal Detection................................................................................................................................................... 20
100BaseFX Far End Fault ....................................................................................................................................................... 20
10BASE-T Transmit................................................................................................................................................................. 20
10BASE-T Receive.................................................................................................................................................................. 20
Power Management ................................................................................................................................................................ 20
MDI/MDI-X Auto Crossover ..................................................................................................................................................... 20
Auto-Negotiation...................................................................................................................................................................... 20
Functional Overview: Switch Core ...............................................................................................................................................
21
Address Look Up ..................................................................................................................................................................... 21
Learning
Migration
Aging
Switching Engine ..................................................................................................................................................................... 21
MAC (Media Access Controller) Operation ............................................................................................................................. 22
Inter-Packet Gap............................................................................................................................................................. 22
Backoff Algorithm............................................................................................................................................................ 22
Late Collision .................................................................................................................................................................. 22
Illegal Frame ................................................................................................................................................................... 22
Flow Control.................................................................................................................................................................... 22
Half-Duplex Back Pressure............................................................................................................................................. 22
Broadcast Storm Protection ............................................................................................................................................ 23
MII Interface Operation ..................................................................................................................................................................
23
SNI Interface Operation .................................................................................................................................................................
25
Advanced Functionality.................................................................................................................................................................
25
QoS Support............................................................................................................................................................................ 25
Rate Limit Support................................................................................................................................................................... 27
Configuration Interface ............................................................................................................................................................ 28
I
2
C Master Serial Bus Configuration ............................................................................................................................... 28
MII Management Interface (MIIM) ..................................................................................................................................................
28
Register Map
Global Registers ...................................................................................................................................................................... 29
Register 0 (0x00): Chip ID0............................................................................................................................................ 29
Register 1 (0x01): Chip ID1/Start Switch ....................................................................................................................... 29
Register 2 (0x02): Global Control 0................................................................................................................................ 29
Register 3 (0x03): Global Control 1................................................................................................................................ 30
Register 4 (0x04): Global Control 2................................................................................................................................ 31
Register 5 (0x05): Global Control 3................................................................................................................................ 31
Register 6 (0x06): Global Control 4................................................................................................................................ 32
Register 7 (0x07): Global Control 5................................................................................................................................ 32
Micrel, Inc.
M9999-051305
4
May 2005
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