參數(shù)資料
型號(hào): KSZ8995FQ
廠商: Micrel Inc
文件頁數(shù): 35/89頁
文件大?。?/td> 0K
描述: IC SWITCH 10/100 5PORT 128-PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-3872-ND - BOARD EVALUATION FOR KSZ8995FQ
其它名稱: 576-3077
Micrel, Inc.
KS8995MA/FQ
October 2011
40
M9999-102611-3.0
VLAN Support
KS8995MA/FQ supports 16 active VLANs out of 4096 possible VLANs specified in IEEE 802.1q. KS8995MA/FQ provides
a 16-entry VLAN table, which converts VID (12 bits) to FID (4 bits) for address look-up. If a non-tagged or null-VID-tagged
packet is received, the ingress port VID is used for look-up. In the VLAN mode, the look-up process starts with VLAN table
look-up to determine whether the VID is valid. If the VID is not valid, the packet will be dropped and its address will not be
learned. If the VID is valid, FID is retrieved for further look-up. FID+DA is used to determine the destination port. FID+SA
is used for learning purposes.
DA Found In
Static MAC Table
USE FID Flag?
FID Match?
DA+FID Found In
Dynamic MAC Table
Action
No
Don’t Care
No
Broadcast to the membership ports defined in the VLAN
table bit [20:16].
No
Don’t Care
Yes
Send to the destination port defined in the dynamic
MAC table bit [54:52].
Yes
0
Don’t Care
Send to the destination port(s) defined in the static MAC
table bit [52:48].
Yes
1
No
Broadcast to the membership ports defined in the VLAN
table bit [20:16].
Yes
1
No
Yes
Send to the destination port defined in the dynamic
MAC table bit [54:52].
Yes
1
Yes
Don’t Care
Send to the destination port(s) defined in the static MAC
table bit [52:48].
Table 7. FID+DA Look-Up in the VLAN Mode
SA+FID found in
Dynamic MAC table
Action
No
The SA+FID will be learned into the dynamic table.
Yes
Time stamp will be updated.
Table 8. FID+SA Look-Up in the VLAN Mode
Advanced VLAN features are also supported in KS8995MA/FQ, such as “VLAN ingress filtering” and “discard non PVID”
defined in Register 18 Bit 6 and Bit 5. These features can be controlled on a port basis.
Rate Limit Support
KS8995MA/FQ supports hardware rate limiting on “receive” and “transmit” independently on a per port basis. It also
supports rate limiting in a priority or non-priority environment. The rate limit starts from 0Kbps and goes up to the line rate
in steps of 32Kbps. The KS8995MA/FQ uses one second as an interval. At the beginning of each interval, the counter is
cleared to zero, and the rate limit mechanism starts to count the number of bytes during this interval.
For receive, if the number of bytes exceeds the programmed limit, the switch will stop receiving packets on the port until
the “one second” interval expires. There is an option provided for flow control to prevent packet loss. If the rate limit is
programmed greater than or equal to 128Kbps and the byte counter is 8K bytes below the limit, the flow control will be
triggered. If the rate limit is programmed lower than 128Kbps and the byte counter is 2K bytes below the limit, the flow
control will be triggered.
For transmit, if the number of bytes exceeds the programmed limit, the switch will stop transmitting packets on the port
until the “one second” interval expires.
If priority is enabled, the KS8995MA/FQ can support different rate controls for both high priority and low priority packets.
This can be programmed through Registers 21 – 27.
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