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參數(shù)資料
| 型號： | KSZ8993MLI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 28/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH 10/100 3PORT 128-PQFP |
| 標(biāo)準包裝： | 66 |
| 系列： | * |
| 產(chǎn)品目錄頁面： | 1081 (CN2011-ZH PDF) |
| 其它名稱： | 576-3350 |
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Micrel, Inc.
KSZ8993M/ML
October 2008
34
M9999-020606
Registers are 8 data bits wide. For read operation, data bits [15:8] are read back as 0’s. For write
operation, data bits [15:8] are not defined, and hence can be set to either 0’s or 1’s.
SMI register access is the same as the MIIM register access, except for the register access requirements
presented in this section.
Advanced Switch Functions
Spanning Tree Support
To support spanning tree, port 3 is the designated port for the processor.
The other ports (port 1 and port 2) can be configured in one of the five spanning tree states via “transmit enable”,
“receive enable” and “l(fā)earning disable” register settings in registers 18 and 34 for ports 1 and 2, respectively. The
following description shows the port setting and software actions taken for each of the five spanning tree states.
Disable state:
The port should not forward or receive any packets.
Learning is disabled.
Port setting:
“transmit enable = 0, receive enable = 0, learning disable =1”
Software action:
The processor should not send any packets to the port. The switch may still send specific packets
to the processor (packets that match some entries in the “static MAC table” with “overriding bit”
set) and the processor should discard those packets. Note: processor is connected to port 3 via
MII interface. Address learning is disabled on the port in this state.
Blocking state:
Only packets to the processor are forwarded.
Learning is disabled.
Port setting:
“transmit enable = 0, receive enable = 0, learning disable =1”
Software action:
The processor should not send any packets to the port(s) in this state. The processor should
program the “Static MAC table” with the entries that it needs to receive (e.g. BPDU packets). The
“overriding” bit should also be set so that the switch will forward those specific packets to the
processor. Address learning is disabled on the port in this state.
Listening state:
Only packets to and from the processor are forwarded.
Learning is disabled.
Port setting:
“transmit enable = 0, receive enable = 0, learning disable =1”
Software action:
The processor should program the “Static MAC table” with the entries that it needs to receive
(e.g., BPDU packets). The “overriding” bit should be set so that the switch will forward those
specific packets to the processor. The processor may send packets to the port(s) in this state,
see “Special Tagging Mode” for details. Address learning is disabled on the port in this state.
Learning state:
Only packets to and from the processor are forwarded.
Learning is enabled.
Port setting:
“transmit enable = 0, receive enable = 0, learning disable = 0”
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| KSZ8995FQ | 功能描述:以太網(wǎng) IC Integrated 5-Port Switch with Fiber on Port 3 & 4, Lead free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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| KSZ8995M | 功能描述:以太網(wǎng) IC 5 Port 10/100 Switch with PHY and Frame Buffers (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8995MA | 功能描述:以太網(wǎng) IC 5 Port 10/100 Switch with PHY and Frame Buffers (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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