參數(shù)資料
型號: KSZ8873MLLI
廠商: Micrel Inc
文件頁數(shù): 7/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
標準包裝: 160
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-PQFP(10x10)
包裝: 托盤
PIC16(L)F1508/9
DS41609A-page 104
Preliminary
2011 Microchip Technology Inc.
EXAMPLE 10-3:
WRITING TO FLASH PROGRAM MEMORY
; This write routine assumes the following:
; 1. 64 bytes of data are loaded, starting at the address in DATA_ADDR
; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,
; stored in little endian format
; 3. A valid starting address (the least significant bits = 00000) is loaded in ADDRH:ADDRL
; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
;
BCF
INTCON,GIE
; Disable ints so required sequences will execute properly
BANKSEL
PMADRH
; Bank 3
MOVF
ADDRH,W
; Load initial address
MOVWF
PMADRH
;
MOVF
ADDRL,W
;
MOVWF
PMADRL
;
MOVLW
LOW DATA_ADDR
; Load initial data address
MOVWF
FSR0L
;
MOVLW
HIGH DATA_ADDR ; Load initial data address
MOVWF
FSR0H
;
BCF
PMCON1,CFGS
; Not configuration space
BSF
PMCON1,WREN
; Enable writes
BSF
PMCON1,LWLO
; Only Load Write Latches
LOOP
MOVIW
FSR0++
; Load first data byte into lower
MOVWF
PMDATL
;
MOVIW
FSR0++
; Load second data byte into upper
MOVWF
PMDATH
;
MOVF
PMADRL,W
; Check if lower bits of address are '00000'
XORLW
0x1F
; Check if we're on the last of 32 addresses
ANDLW
0x1F
;
BTFSC
STATUS,Z
; Exit if last of 32 words,
GOTO
START_WRITE
;
MOVLW
55h
; Start of required write sequence:
MOVWF
PMCON2
; Write 55h
MOVLW
0AAh
;
MOVWF
PMCON2
; Write AAh
BSF
PMCON1,WR
; Set WR bit to begin write
NOP
; NOP instructions are forced as processor
; loads program memory write latches
NOP
;
INCF
PMADRL,F
; Still loading latches Increment address
GOTO
LOOP
; Write next latches
START_WRITE
BCF
PMCON1,LWLO
; No more loading latches - Actually start Flash program
; memory write
MOVLW
55h
; Start of required write sequence:
MOVWF
PMCON2
; Write 55h
MOVLW
0AAh
;
MOVWF
PMCON2
; Write AAh
BSF
PMCON1,WR
; Set WR bit to begin write
NOP
; NOP instructions are forced as processor writes
; all the program memory write latches simultaneously
NOP
; to program memory.
; After NOPs, the processor
; stalls until the self-write process in complete
; after write processor continues with 3rd instruction
BCF
PMCON1,WREN
; Disable writes
BSF
INTCON,GIE
; Enable interrupts
Required
S
equence
Required
Sequenc
e
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