參數(shù)資料
型號(hào): KSZ8873MLLI
廠商: Micrel Inc
文件頁數(shù): 68/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
標(biāo)準(zhǔn)包裝: 160
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-PQFP(10x10)
包裝: 托盤
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
56
Revision 1.6
Register 4 (0x04): Global Control 2 (Continued)
Bit
Name
R/W
Description
Default
2
Huge Packet
Support
R/W
=1, Will accept packet sizes up to 1916 bytes (inclusive). This bit setting will
override setting from bit 1 of this register.
=0, The max packet size will be determined by bit 1 of this register.
0
1
Legal Maximum
Packet Size Check
Enable
R/W
=0, Will accept packet sizes up to 1536 bytes (inclusive).
=1, 1522 bytes for tagged packets, 1518 bytes for untagged packets. Any
packets larger than the specified value will be dropped.
0
Reserved
R/W
Reserved
Do not change the default value.
0
Register 5 (0x05): Global Control 3
Bit
Name
R/W
Description
Default
7
802.1Q VLAN
Enable
R/W
=1, 802.1Q VLAN mode is turned on. VLAN table needs to set up before the
operation.
=0, 802.1Q VLAN is disabled.
0
6
IGMP Snoop Enable
on Switch MII
Interface
R/W
=1, IGMP snoop is enabled. All IGMP packets will be forwarded to the Switch
MII port.
=0, IGMP snoop is disabled.
0
5
Reserved
RO
Reserved
Do not change the default values.
0
4
Reserved
RO
Reserved
Do not change the default values.
0
3
Weighted
Fair Queue
Enable
R/W
=0, Priority method set by the registers 175-186 bit [7]=0 for port 1, port 2 and
port 3.
=1, Weighted Fair Queueing enabled. When all four queues have packets waiting
to transmit, the bandwidth allocation is q3:q2:q1:q0 = 8:4:2:1.
If any queues are empty, the highest non-empty queue gets one more weighting.
For example, if q2 is empty, q3:q2:q1:q0 becomes (8+1):0:2:1.
0
2
Reserved
RO
Reserved
Do not change the default values.
0
1
Reserved
RO
Reserved
Do not change the default values.
0
Sniff Mode Select
R/W
=1, Will do RX AND TX sniff (both source port and destination port need to
match)
=0, Will do RX OR TX sniff (either source port or destination port needs to
match). This is the mode used to implement RX only sniff.
0
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