參數(shù)資料
型號(hào)： KSZ8863RLLI
廠商： Micrel Inc
文件頁(yè)數(shù)： 17/106頁(yè)
文件大?。?/td> 0K
描述： IC ETHERNET SWITCH 3PORT 48-LQFP
標(biāo)準(zhǔn)包裝： 250
控制器類型： 以太網(wǎng)開(kāi)關(guān)控制器
接口： MII
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
配用： 576-3868-ND - BOARD EVALUATION FOR KSZ8863RLL
其它名稱： 576-3752
PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 17
2.5
Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer). This is indirect addressing.
EXAMPLE 2-1:
INDIRECT ADDRESSING
Register le 05 contains the value 10h
Register le 06 contains the value 0Ah
Load the value 05 into the FSR register
A read of the INDF register will return the value of
10h
Increment the value of the FSR register by one
(FSR = 06)
A read of the INDR register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;
to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR
;inc pointer
btfss
FSR,4 ;all done?
goto
NEXT
;NO, clear next
CONTINUE
:
;YES, continue
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-11. However, IRP is not used in the
PIC16C72 Series.
FIGURE 2-11: DIRECT/INDIRECT ADDRESSING
Note 1: For register le map detail see Figure 2-2.
2: Maintain RP1 and IRP as clear for upward compatibility with future products.
3: Not implemented.
Data
Memory(1)
Indirect Addressing
Direct Addressing
bank select
location select
RP1:RP0
6
0
from opcode
IRP
FSR register
7
0
bank select
location select
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
not used
FFh
80h
7Fh
00h
17Fh
100h
1FFh
180h
(2)
(3)
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