參數(shù)資料
型號(hào): KSZ8842-PMBL AM
廠商: Micrel Inc
文件頁數(shù): 55/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SW 2PORT 100-LFBGA
標(biāo)準(zhǔn)包裝: 260
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
配用: 576-1636-ND - BOARD EVALUATION KSZ8842-PMQL
其它名稱: 576-3348
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
40
M9999-100207-1.5
The following table describes the CFCS register bit fields.
Bit
Type
Default
Description
31
Status
0
Detected Parity Error
When set, indicates that the KSZ8842-PMQL/PMBL detected a
parity error, even if parity error handling is disabled in parity error
response (CFCS[6]).
30
Status
0
Signal System Error
When set, indicates that the KSZ8842-PMQL/PMBL asserted the
system error SERR_N pin/ball.
29
Status
0
Received Master Abort
When set, indicates that the KSZ8842-PMQL/PMBL terminated a
master transaction with master abort.
28
Status
0
Received Target Abort
When set, indicates that the KSZ8842-PMQL/PMBL master
transaction was terminated due to a target abort.
27
Status
0
Target Abort
This bit is set by KSZ8842-PMQL/PMBL whenever it terminates
with a Target Abort. The CSR registers are all 32-bit Little Endian
format.
For PCI register Read cycles, the KSZ8842-PMQL/PMBL allows
any different combination of CBEN. For PCI register bus cycles,
only byte, word (16-bit), or Dword (32-bit) accesses are allowed.
Any other combination is illegal and is target aborted.
26 – 25
Status
01
Device Select Timing
Indicates the timing of the assertion of device select(DEVSEL_N).
These bits are fixed at 01, which indicates a middle assertion of
DEVSEL_N.
24
Status
0
Data Parity Report
This bit is set when the following conditions are met:
The KSZ8842-PMQL/PMBL asserts parity error PERR_N or it
senses the assertion of PERR_N by another device.
The KSZ8842-PMQL/PMBL operates as a bus master for the
operation that caused the error.
Parity error response (CFCS[6]) is set.
23 – 22
Reserved
00
Reserved
21
Status
0
66MHz Capable
0 = Not 66MHz capable
20 – 9
Reserved
0x000
Reserved
8
Command
0
System Error Enable
When set, the KSZ8842-PMQL/PMBL asserts system error
(SERR_N) when it detects a parity error on the address phase.
7
Reserved
0
Reserved
6
Command
0
Parity Error Response
When set, the KSZ8842-PMQL/PMBL asserts fatal bus error after it
detects a parity error.
When reset, any detected parity error is ignored and the KSZ8842-
PMQL/PMBL continues normal operation. Parity checking is
disabled after hardware reset.
5 – 3
Reserved
000
Reserved
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8842-PMBL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 2+1 Port 10/100 Ethernet Switch with 32b/33MHz PCI Interface (BGA Version) Eval Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8842-PMBL-TR 功能描述:Ethernet Switch 10/100 Base-T/TX PHY PCI Interface 100-LFBGA (9x9) 制造商:microchip technology 系列:- 包裝:剪切帶(CT) 零件狀態(tài):停產(chǎn) 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:PCI 標(biāo)準(zhǔn):10/100 Base-T/TX PHY 電壓 - 電源:3.1 V ~ 3.5 V 電流 - 電源:122mA 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LFBGA 供應(yīng)商器件封裝:100-LFBGA(9x9) 標(biāo)準(zhǔn)包裝:1
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KSZ8842-PMQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8842-PMQL Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8842-PMQLI 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI bus interface, Ind Temp (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray