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參數(shù)資料
| 型號： | KSZ8051MLL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 41/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | TXRX PHY 10/T100 3.3V MII 48LQFP |
| 特色產(chǎn)品： | KSZ8051MLL Physical Layer Transceiver KSZ8051/8031/8021 Series |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 類型： | PHY 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | MII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 配用： | 576-3864-ND - BOARD EVALUATION FOR KSZ8051MLL |
| 其它名稱： | 576-3731 |
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2008 Microchip Technology Inc.
DS22060B-page 49
MCP413X/415X/423X/425X
7.2
Data Byte
Only the Read Command and the Write Command use
the Data Byte, see Figure 7-1. These commands
concatenate the 8-bits of the Data Byte with the one
data bit (D8) contained in the Command Byte to form
9-bits of data (D8:D0). The Command Byte format
supports up to 9-bits of data so that the 8-bit resistor
network can be set to Full-Scale (100h or greater). This
allows wiper connections to Terminal A and to
Terminal B.
The D9 bit is currently unused, and corresponds to the
position on the SDO data of the CMDERR bit.
7.3
Error Condition
The CMDERR bit indicates if the four address bits
received (AD3:AD0) and the two command bits
received (C1:C0) are a valid combination (see
Table 4-1). The CMDERR bit is high if the combination
is valid and low if the combination is invalid.
SPI commands that do not have a multiple of 8 clocks
are ignored.
Once an error condition has occurred, any following
commands are ignored. All following SDO bits will be
low until the CMDERR condition is cleared by forcing
the CS pin to the inactive state (VIH).
7.3.1
ABORTING A TRANSMISSION
All SPI transmissions must have the correct number of
SCK pulses to be executed. The command is not
executed until the complete number of clocks have
been received. If the CS pin is forced to the inactive
state (VIH) the serial interface is reset. Partial com-
mands are not executed.
SPI is more susceptible to noise than other bus
protocols. The most likely case is that this noise
corrupts the value of the data being clocked into the
MCP4XXX or the SCK pin is injected with extra clock
pulses. This may cause data to be corrupted in the
device, or a command error to occur, since the address
and command bits were not a valid combination. The
extra SCK pulse will also cause the SPI data (SDI) and
clock (SCK) to be out of sync. Forcing the CS pin to the
inactive state (VIH) resets the serial interface. The SPI
interface will ignore activity on the SDI and SCK pins
until the CS pin transition to the active state is detected
(VIH to VIL or VIH to VIHH).
Note 1: When data is not being received by the
MCP4XXX, It is recommended that the
CS pin be forced to the inactive level (VIL)
2: It is also recommended that long
continuous command strings should be
broken down into single commands or
shorter continuous command strings.
This reduces the probability of noise on
the SCK pin corrupting the desired SPI
commands.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8051MLL TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (48-LQFP) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MLL-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (48-LQFP) - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8051MLLI | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (48-LQFP, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MLLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (48-LQFP, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MLLI-TR | 功能描述:1/1 Transceiver Full MII 48-LQFP (7x7) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):過期 類型:收發(fā)器 協(xié)議:MII 驅(qū)動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:1.8V，2.5V，3.3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商器件封裝:48-LQFP（7x7） 標(biāo)準(zhǔn)包裝:1 |
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