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參數資料
| 型號： | KS0794 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 160 COM / 160 SEG DRIVER FOR STN LCD |
| 中文描述： | 160的COM / 160賽格驅動STN液晶顯示器 |
| 文件頁數： | 13/31頁 |
| 文件大?。?/td> | 268K |
| 代理商： | KS0794 |
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KS0794 PRELIMINARY SPEC. VER. 1.1 160 COM / SEG DRIVER FOR STN LCD
13
Common Mode
Symbol
V
DD
V
SS
Function
Logic system power supply pin connects to +2.4 to +5.5V
Ground pin connects to 0 V
Power supply pin for LC driver voltage bias.
. Normally, the bias voltage used is set by a resistor divider.
. Ensure that voltage are set such that V
SS
<V
43
<V
12
<V
0
.
. To further reduce the difference between the output waveforms of LC driver
output pins Y
1
and Y
160
, externally connect V
iR
and V
iL
(I = 0, 12, 43)
Bidirectional shift register shift data input/output pin
. Output pin when L/R is at V
SS
level “L”, input pin when L/R is at V
DD
level
“H”.
. When EIO1 is used as input pin, it will be pull-down.
. When EIO1 is used as output pin, it won’t be pull-down.
Bidirectional shift register shift data input / output pin
. Input pin when L/R is at V
SS
level “L”, output pin when L/R is at V
DD
level
“H”.
. When EIO
2
is used as input pin, it will be pull-down.
. When EIO
2
is used as output pin, it won’t be pull-down.
Bidirectional shift register shift clock pulse input pin
. Data is shifted on the falling edge of the clock pulse.
Bidirectional shift register shift direction selection pin
. Data is shifted from Y
160
to Y
1
when set to V
SS
to level “L”, and data is
shifted from Y
1
to Y
160
when set to V
DD
level “H”.
V
0R
, V
0L
V
12R
, V
12L
V
43R
, V
43L
EIO
1
EIO
2
LP
L/R
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