參數(shù)資料
型號: KMPC8314ECVRAGDA
廠商: Freescale Semiconductor
文件頁數(shù): 14/101頁
文件大?。?/td> 0K
描述: IC MPU POWERQUICC II 620-PBGA
標準包裝: 2
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
電壓: 1V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
2
Freescale Semiconductor
Overview
1
Overview
The MPC8314E incorporates the e300c3 (MPC603e-based) core, which includes 16 Kbytes of L1
instruction and data caches, on-chip memory management units (MMUs), and floating-point support. In
addition to the e300 core, the SoC platform includes features such as dual enhanced three-speed 10, 100,
1000 Mbps Ethernet controllers (eTSECs) with SGMII support, a 32- or 16-bit DDR1/DDR2 SDRAM
memory controller, a security engine to accelerate control and data plane security protocols, and a high
degree of software compatibility with previous-generation PowerQUICC processor-based designs for
backward compatibility and easier software migration. The MPC8314E also offers peripheral interfaces
such as a 32-bit PCI interface with up to 66 MHz operation, 16-bit enhanced local bus interface with up to
66 MHz operation, TDM interface, and USB 2.0 with an on-chip USB 2.0 PHY.
8314E offers additional high-speed interconnect support with dual single-lane PCI Express interfaces.
When not used for PCI Express, the SerDes interface may be configured to support SGMII. The
MPC8314E security engine (SEC 3.3) allows CPU-intensive cryptographic operations to be offloaded
from the main CPU core. This figure shows a block diagram of the MPC8314E.
Figure 1. MPC8314E Block Diagram
2
MPC8314E Features
The following features are supported in the MPC8314E.
2.1
e300 Core
The e300 core has the following features:
Operates at up to 400 MHz
16-Kbyte instruction cache, 16-Kbyte data cache
eTSEC
RTBI, SGMII
DUART
Interrupt
I2C
Timers
GPIO
Enhanced
DDR1/DDR2
Controller
PCI
I/O
Sequencer
(IOS)
Security
Note: The MPC8314 do not include a security engine.
Local Bus,
USB 2.0 HS
Host/Device/OTG
ULPI
On-Chip
HS PHY
SPI
Engine 3.3
PCI
Express
x1
DMA
TDM
RGMII, (R)MII
eTSEC
RTBI, SGMII
RGMII, (R)MII
16-KB
D-Cache
16-KB
I-Cache
e300c3 Core with
Power Management
FPU
PCI
Express
x1
MPC8314E
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