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參數(shù)資料
| 型號： | KM611001L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 1Bit High-Speed CMOS SRAM |
| 中文描述： | 100萬x 1位高速CMOS SRAM的 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 95K |
| 代理商： | KM611001L |
KM611001/L
CMOS SRAM
Rev 2.0
July-1996
4
WRITE CYCLE
Parameter
Symbol
Write Cycle Time
Chip Select to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width(/OE High)
Write Pulse Width(/OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
tWC
tCW
tAS
tAW
tWP
tWP
tWR
tWHZ
tDW
tDH
tOW
Unit
25
20
0
20
20
25
3
0
15
0
0
-
-
-
-
-
-
-
10
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ CYCLE
Parameter
Symbol
Read Cycle Time
Address Access Time
Chip Select to Output
Chip Enable to Low-Z Output
Chip Disable to High-Z Output
Output Hold from Address Change
Chip Select to Power Up Time
Chip Select to Power Down Time
tRC
tAA
tCO
tLZ
tHZ
tOH
tPU
tPD
Unit
25
-
-
5
0
5
0
-
-
25
25
-
15
-
-
25
ns
ns
ns
ns
ns
ns
ns
ns
Min
Max
KM611001/L -25
Min
Max
Min
Max
KM611001/L -35
Min
Max
KM611001/L -25
Min
Max
Min
Max
KM611001/L -35
35
30
0
30
25
35
3
0
20
0
0
-
-
-
-
-
-
-
12
-
-
-
35
-
-
5
0
5
0
-
-
35
35
-
15
-
-
35
20
17
0
17
15
20
2
0
12
0
0
-
-
-
-
-
-
-
8
-
-
-
20
-
-
5
0
3
0
-
-
20
20
-
12
-
-
20
KM611001/L-20
KM611001/L -20
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