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參數(shù)資料
| 型號： | KM611001L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 1Bit High-Speed CMOS SRAM |
| 中文描述： | 100萬x 1位高速CMOS SRAM的 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 95K |
| 代理商： | KM611001L |
KM611001/L
CMOS SRAM
Rev 2.0
July-1996
3
5pF*
+5.0V
DOUT
Output Load (B)
for tHZ, tLZ, tWHZ, tOW, tOLZ, & tOHZ
Output Load (A)
AC CHARACTERISTICS
TEST CONDITIONS ON DATA RAM
(TA= 0 to 70 °C, Vcc=5.0V 10%, unless otherwise specified.)
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
Value
0 to 3 V
3ns
1.5V
See below
* Including Scope and Jig Capacitance
255
480
CAPACITANCE
*
(f=1MHz, TA =25 °C)
* Note: Capacitance is sampled and not 100% tested.
Item
Symbol
Test Condition
Min.
Max.
Unit
Input Capacitance
Input/Output Capacitance
CIN
CI/O
VIN=0V
VI/O=0V
7
7
pF
pF
-
-
30pF*
+5.0V
DOUT
255
480
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