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參數(shù)資料
| 型號： | KM416V4100C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 16bit CMOS Dynamic RAM with Fast Page Mode(4M x 16位 CMOS動態(tài)RAM(帶快速頁模式)) |
| 中文描述： | 4米× 16位的快速頁面模式的CMOS動態(tài)RAM（4米× 16位的CMOS動態(tài)隨機(jī)存儲器（帶快速頁模式）） |
| 文件頁數(shù)： | 9/35頁 |
| 文件大?。?/td> | 697K |
| 代理商： | KM416V4100C |
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KM416V4000C,
KM416V4100C
CMOS DRAM
t
ASC
,
t
CAH
are referenced to the earlier CAS falling edge.
t
CP
is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next cycle.
t
CWD
is referenced to the later CAS falling edge at word read-modify-write cycle.
t
CWL
is specified from W falling edge to the earlier CAS rising edge.
t
CSR
is referenced to earlier CAS falling before RAS transition low.
t
CHR
is referenced to the later CAS rising high after RAS transition low.
t
DS
is specified for the earlier CAS falling edge and
t
DH
is specified by the later CAS falling edge.
If
t
RASS
≥
100us, then RAS precharge time must use
t
RPS
instead of
t
RP
.
For RAS-only-Refresh and Burst CAS-before-RAS refresh mode, 4096 cycles(4K/8K) of burst refresh must be executed within
64ms before and after self refresh, in order to meet refresh specification.
For distributed CAS-before-RAS with 15.6us interval, CBR refresh should be executed with in 15.6us immediately before and
after self refresh in order to meet refresh specification.
t
CSR
t
CHR
RAS
LCAS
UCAS
t
DS
t
DH
LCAS
UCAS
DQ0 ~ DQ15
Din
21.
20.
19.
15.
14.
13.
18.
17.
16.
22.
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|---|---|
| KM416V4104B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Extended Data Out |
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| KM416V4104CS-45 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 16bit CMOS Dynamic RAM with Extended Data Out |
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