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參數(shù)資料
| 型號(hào)： | KM416S4031B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 16Bit x 4 Banks Synchronous DRAM with SSTL interface(1M x 16位 x4組同步動(dòng)態(tài)RAM（帶SSTL接口）) |
| 中文描述： | 100萬(wàn)× 16 × 4銀行同步DRAM接口與薩里衛(wèi)星技術(shù)有限公司（100萬(wàn)× 16位x4組同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器（帶SSTL公司接口）） |
| 文件頁(yè)數(shù)： | 1/40頁(yè) |
| 文件大?。?/td> | 590K |
| 代理商： | KM416S4031B |
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KM416S4031B
CMOS SDRAM
REV. 0 Mar. '98
Preliminary
The KM416S4031B is 67,108,864 bits synchronous high data
rate Dynamic RAM organized as 4 x 1,048,576 words by 16
bits, fabricated with SAMSUNG
′
s high performance CMOS
technology. Synchronous design allows precise cycle control
with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programma-
ble burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
JEDEC standard 3.3V power supply
SSTL_3 (Class II) compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1M x 16Bit x 4 Banks Synchronous DRAM with SSTL interface
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
1M x 16
1M x 16
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
1M x 16
1M x 16
Timing Register
ORDERING INFORMATION
* KM416S4031BT-GS : CL=2 only
Part No.
Max Freq.
143MHz
100MHz(CL=2)
125MHz
Interface
Package
KM416S4031BT-G7
KM416S4031BT-GS
KM416S4031BT-G8
SSTL_3
(Class II)
54
TSOP(II)
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| KM416S8030BN | 128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM416S8030 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 16Bit x 4 Banks Synchronous DRAM |
| KM416S8030B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030BN | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030BN-G/FH | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030BN-G/FL | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
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