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參數(shù)資料
| 型號(hào)： | KM416S4021B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 16Bit x 2 Banks Synchronous DRAM(2M x 16位 x2組同步動(dòng)態(tài)RAM) |
| 中文描述： | 200萬(wàn)× 16 × 2銀行同步DRAM（2米× 16位x2組同步動(dòng)態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 59K |
| 代理商： | KM416S4021B |
KM416S4021B
CMOS SDRAM
REV. 0 Jun. '97
The KM416S4021B is 67,108,864 bits synchronous high data
rate Dynamic RAM organized as 2 x 2,097,152 words by 16
bits, fabricated with SAMSUNG
′
s high performance CMOS
technology. Synchronous design allows precise cycle control
with the use of system clock I/O transactions are possible on
every clock cycle. Range of operating frequencies, programma-
ble burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
JEDEC standard 3.3V power supply
SSTL_3 (Class II) compatible with multiplexed address
Dual banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K Cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
2M x 16Bit x 2 Banks Synchronous DRAM
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
2M x 16
2M x 16
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
Timing Register
ORDERING INFORMATION
Part No.
Max Freq.
143MHz
125MHz
Interface
SSTL_3
(Class II)
Package
54
TSOP(II)
KM416S4021BT-G7
KM416S4021BT-G8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM416S4030B | 1M x 16Bitx 4 Banks Synchronous DRAM(1M x 16位 x4組同步動(dòng)態(tài)RAM) |
| KM416S4031B | 1M x 16Bit x 4 Banks Synchronous DRAM with SSTL interface(1M x 16位 x4組同步動(dòng)態(tài)RAM（帶SSTL接口）) |
| KM416S4031C | 1M x 16Bit x 4 Banks Synchronous DRAM with SSTL interface(1M x 16位 x4組同步動(dòng)態(tài)RAM（帶SSTL接口）) |
| KM416S8030BN | 128Mb SDRAM Shrink TSOP 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
| KM416S8030B | 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM416S4030C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Synchronous DRAM |
| KM416S4030CT-F10 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Synchronous DRAM |
| KM416S4030CT-F7 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Synchronous DRAM |
| KM416S4030CT-F8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Synchronous DRAM |
| KM416S4030CT-FH | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Synchronous DRAM |
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