參數(shù)資料
型號: KM416S1120D
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16bit x 2 Banks Synchronous DRAM LVTTL
中文描述: 為512k × 16位× 2銀行同步DRAM LVTTL
文件頁數(shù): 29/43頁
文件大?。?/td> 1131K
代理商: KM416S1120D
KM416S1120D
CMOS SDRAM
- 29
Rev. 1.4 (Jun. 1999)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Read & Write Cycle at Same Bank @Burst Length=4
HIGH
Row Active
(A-Bank)
Precharge
(A-Bank)
Row Active
(A-Bank)
Write
(A-Bank)
Precharge
(A-Bank)
: Don't care
*Note :
1. Minimum row cycle times is required to complete internal DRAM operation.
2. Row precharge can interrupt burst on any cycle. [CAS Latency - 1] number of valid output data
is available after Row precharge. Last valid output will be Hi-Z(t
SHZ
) after the clcok.
3. Access time from Row active command. t
CC
*(t
RCD
+ CAS latency - 1) + t
SAC
4. Ouput will be Hi-Z after the end of burst. (1, 2, 4, 8 & Full page bit burst wrap-around).
Read
(A-Bank)
*Note 1
tRC
tRCD
*Note 2
tRDL
tRDL
tSHZ
*Note 4
tSHZ
*Note 4
tOH
tRAC
*Note 3
tSAC
tSAC
tRAC
*Note 3
tOH
BA
A
10
/AP
CL=2
CL=3
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
Ra
Rb
Qa0
Qa1
Qa2
Qa3
Qa0
Qa1
Qa2
Qa3
Db0
Db1
Db2
Db3
Db0
Db1
Db2
Db3
Ra
Ca0
Rb
Cb0
WE
DQM
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KM416S1120DT-G/F10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL
KM416S1120DT-G/F6 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL
KM416S1120DT-G/F7 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL
KM416S1120DT-G/F8 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL
KM416S1120DT-G/FC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512K x 16bit x 2 Banks Synchronous DRAM LVTTL