參數(shù)資料
型號： KD16901
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Audio Effect Processor(音頻效果處理器)
中文描述： 音頻效果器（音頻效果處理器）
文件頁數(shù)： 24/68頁
文件大?。?/td> 381K
代理商： KD16901
FUNCTIONAL DESCRIPTION
AUDIO EFFECT PROCESSOR
3-24
User Defined Mode
The User Defined Mode enables one to design a new sound effect mode by setting the parameters of existing filter
structure. The block diagram of this filter structure is shown in Figure 16. One can set these parameters by sending
host commands corresponding to each parameters. The commands used for this mode are listed in Chapter 4. The
command codes from 0x49 to 0x71 are assigned to User Defined Mode. The usage of individual parameter in
Figure 16 is as follows:
The gain parameters, G0 and G1, are used to control left and right input gains respectively.
The parameters, BL0, BL1 and AL1, are coefficients of the IIR filter used for left prefilter. The parameters, BR0,
BR1 and AR1, are coefficients of the IIR filter used for right prefilter. The parameters, BD0, BD1 and AD1 are
coefficients of the IIR filter used for postfilter. The structures of all three filters are realized by the first order IIR.
The zero of the transfer function of each filter is – BX1 / BX0 and the pole is – AX1, where X is L or R or D.
The parameters, G2, G3 and G4, are left term gain, right term gain and feed-back term gain respectively.
The parameters, G5 to G11, are gains of delayed signals in the left channel. The parameters, G14 to G20, are
gains of delayed signals in the right channel. The parameters, G12 and G21, are gains of effected output
signals. The parameters, G13 and G22, are gains of directed output signals.
The parameter, T0, is the pointer address of the feed-back signal in the delay memory. The parameter, Tc, is
the pointer address of the current input signal. The parameters, T1 to T7, are pointers designating addresses of
the 7 different delayed signals. Note that the pointer address is same as the amount of delay. Thus, T0 to T7
values can be simply determined as the amount of delay which one wants to set.
Figure 16. Block Diagram for User Defined Mode
G1
Right Prefilter
G3
G4
G0
Left Prefilter
G2
+
Postfilter
Delay Line Buffer
+
+
G5
G6
G7
G8
G9
G11
G14
G15
G16
G17
G20
T
c
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
0
+
+
G12
G21
G13
G22
L
R
BL0
BL1
AL1
BR0
BR1
AR1
BD0
BD1
AD0
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