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參數(shù)資料
| 型號： | KD16902 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Virtual Surround Processor(虛擬環(huán)繞處理器) |
| 中文描述： | 虛擬環(huán)繞聲處理器（虛擬環(huán)繞處理器） |
| 文件頁數(shù)： | 1/74頁 |
| 文件大?。?/td> | 327K |
| 代理商： | KD16902 |
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PRODUCT OVERVIEW
KD16902 VIRTUAL SURROUND PROCESSOR
1
1 PRODUCT OVERVIEW
Overview
The KD16902 Virtual Surround Processor enables an average customer to enjoy the surround effect of the Dolby
Digital
'
s (formally known as Dolby AC-3) 5.1 channel audio without the cost of implementing six speaker system.
The chip implements Virtual Surround function, based on QSurround algorithm licensed from QSound Labs, Inc.
The main part of the function converts the 5.1 channel output of Dolby Digital into 2 channel output without loss of
the surround effect. Furthermore, the KD16902 provides an additional mode which produce the output with 3 to 5.1
channels. Therefore, the customer can enjoy the surround effect regardless of number of speakers using the
KD16902.
The KD16902 has an extra pin designated for stereo output. The pin can be used for connection to VCR audio
input. The Dolby Digital output is converted into two channel audio for this pin. This is an attractive feature because
a DVDP
'
s output can be recorded into VCR tape with the surround effect.
In addition to the Virtual Surround function, the KD16902 provides bass redirection function. The bass redirection
function prevents small satellite speakers from reproducing deep bass signals which can be distorted. This feature
enables the customer to implement Dolby Digital system without using expensive full range speakers for all 5.1
channels.
The KD16902 has additional flexibility of executing user defined function. The user written codes can be
downloaded from the host and executed as an additional function.
Key Features
Virtual Surround for systems with less than 6 speakers
Bass Redirection
Downmix
User Defined Function
16 bit fixed point DSP core (SSP1605)
Internal data RAM bank0 (256-word: dedicated; Three 256-word: Data/Program)
Internal data RAM bank1 (256-word: dedicated; Three 256-word: Data/Program)
4K-word internal program ROM
Default master clock: 33.8 MHz through built-in doubler using 16.934 MHz crystal when CKSEL=1
CKI is external master clock when CKSEL=0
5.1 Channel Serial Audio Interface
32/44.1/48 KHz sampling frequency
Serial Host Interface
64-pin QFP package
5 volt single power
0.6-
μ
m double metal CMOS technology (CSP4HS)
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