參數(shù)資料
型號(hào): K4S561633C-RBL
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 16Mx16 SDRAM 54CSP
中文描述: 16Mx16顯示內(nèi)存54CSP
文件頁數(shù): 2/8頁
文件大?。?/td> 59K
代理商: K4S561633C-RBL
K4S561633C-R(B)L/N/P
Rev. 1.4 Dec. 2002
CMOS SDRAM
3.0V & 3.3V power supply.
LVCMOS compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs.
-. CAS latency (1 & 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation.
DQM for masking
Auto refresh.
64ms refresh period (8K cycle).
Commercial Temperature Operation (-25
°
C ~ 70
°
C).
Extended Temperature Operation ( -25
°
C ~ 85
°
C).
Inderstrial Temperature Operation ( -40
°
C ~ 85
°
C).
54balls CSP (-RXXX - Pb, -BXXX - Pb Free)
FEATURES
GENERAL DESCRIPTION
The K4S561633C is 268,435,456 bits synchronous high data rate
Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabri-
cated with SAMSUNG's high performance CMOS technology. Syn-
chronous design allows precise cycle control with the use of
system clock and I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst length
and programmable latencies allow the same device to be useful for
a variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
4M x 16Bit x 4 Banks Synchronous DRAM in 54CSP
FUNCTIONAL BLOCK DIAGRAM
Bank Select
Data Input Register
4M x 16
4M x 16
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
4M x 16
4M x 16
Timing Register
* Samsung Electronics reserves the right to change products or specification without notice.
-R(B)L ; Low Power, Operating Temp : -25
°
C ~ 70
°
C.
-R(B)N ; Low Power, Operating Temp : -25
°
C ~ 85
°
C.
-R(B)P : Low Power, Operating Temp : -40
°
C ~ 85
°
C.
Note :
1. In case of 40MHz Frequency, CL1 can be supported.
Part No.
Max Freq.
Interface Package
K4S561633C-R(B)L/N/P75
133MHz(CL=3)
105MHz(CL=2)
LVCMOS
54 CSP
Pb
(Pb Free)
K4S561633C-R(B)L/N/P1H
105MHz(CL=2)
K4S561633C-R(B)L/N/P1L
105MHz(CL=3)
*1
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