參數(shù)資料
型號(hào): K4S561633C-P1L
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 16Mx16 SDRAM 54CSP
中文描述: 16Mx16顯示內(nèi)存54CSP
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 59K
代理商: K4S561633C-P1L
K4S561633C-R(B)L/N/P
Rev. 1.4 Dec. 2002
CMOS SDRAM
DC CHARACTERISTICS
Recommended operating conditions(Voltage referenced to V
SS
= 0V, T
A
=Commercial, Extended, Industrial Temperature)
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S561633C-R(B)L**
4. K4S561633C-R(B)N**
5. K4S561633C-R(B)P**
6. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
Parameter
Symbol
Test Condition
Version
Unit
Note
-75
-1H
-1L
Operating Current
(One Bank Active)
I
CC1
Burst length = 1
t
RC
t
RC
(min)
I
O
= 0 mA
90
85
85
mA
1
Precharge Standby Current
in power-down mode
I
CC2
P
CKE
V
IL
(max), t
CC
= 10ns
0.5
mA
I
CC2
PS
CKE & CLK
V
IL
(max), t
CC
=
0.5
Precharge Standby Current
in non power-down mode
I
CC2
N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
15
mA
I
CC2
NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
10
Active Standby Current
in power-down mode
I
CC3
P
CKE
V
IL
(max), t
CC
= 10ns
6
mA
I
CC3
PS
CKE & CLK
V
IL
(max), t
CC
=
6
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3
N
CKE
V
IH
(min), CS
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
25
mA
I
CC3
NS
CKE
V
IH
(min), CLK
V
IL
(max), t
CC
=
Input signals are stable
25
mA
Operating Current
(Burst Mode)
I
CC4
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
130
130
105
mA
1
Refresh Current
I
CC5
t
RC
t
RC
(min)
185
185
165
mA
2
Self Refresh Current
I
CC6
CKE
0.2V
-R(B)L
800
uA
3
-R(B)N
4
-R(B)P
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