- 您現在的位置：買賣IC網 > PDF目錄67723 > ISL8705IBZT (INTERSIL CORP) DSP-ADDRESS SEQUENCER, PDSO14 PDF資料下載
參數資料
| 型號： | ISL8705IBZT |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數字信號處理外設 |
| 英文描述： | DSP-ADDRESS SEQUENCER, PDSO14 |
| 封裝： | PLASTIC, MS-012AB, SOIC-14 |
| 文件頁數： | 9/12頁 |
| 文件大小： | 351K |
| 代理商： | ISL8705IBZT |
6
FN9250.0
March 14, 2006
An Advanced Tutorial on Setting UV & OV Levels
This section discusses in additional detail the nuances of
setting the UV and OV levels, providing more insight into the
ISL870X than the earlier text.
The following equation set can alternatively be used to work
out ideal values for a 3 resistor divider string of Ru, Rm and
Rl. These equations assume that VREF is the center point
between VUVRvth and VUVFvth (i.e. (VUVRvth + VUVFvth)/2
= 1.17V), Iload is the load current in the resistor string
(i.e. VIN /(Ru + Rm + Rl)), VIN is the nominal input voltage
and Vtol is the acceptable voltage tolerance, such that the
UV and OV thresholds are centered at VIN ± Vtol. The actual
acceptable voltage window will also be affected by the
hysteresis at the UV and OV pins. This hysteresis is
amplified by the resistor string such that the hysteresis at the
top of the string is:
Vhys = VUVhys x VOUT/VREF
This means that the VIN ± Vtol thresholds will exhibit
hysteresis resulting in thresholds of VIN + Vtol ± Vhys/2 and
VIN - Vtol ± Vhys/2.
There is a window between the VIN rising UV threshold and
the VIN falling OV threshold where the input level is
guaranteed not to be detected as a fault. This window exists
between the limits VIN ± (Vtol - Vhys/2). There is an
extension of this window in each direction up to
VIN ± (Vtol + Vhys/2), where the voltage may or may not be
detected as a fault, depending on the direction from which it
is approached. These two equations may be used to
determine the required value of Vtol for a given system. For
example, if VIN is 12V, Vhys = (0.1 x 12)/1.17 = 1.03V. If VIN
must remain within 12V ± 1.5V, Vtol = 1.5 - 1.03/2 = 0.99V.
This will give a window of 12 ±0.48V where the system is
guaranteed not to be in fault and a limit of 12 ±1.5V beyond
which the system is guaranteed to be in fault.
It is wise to check both these voltages for if the latter is made
to tight, the former will cease to exist. This point comes when
Vtol < Vhys/2 and results from the fact that the acceptable
window for the OV pin no longer aligns with the acceptable
window for the UV pin. In this case, the application will have
to be changed such that UV and OV are provided separate
resistor strings. In this case the UV and OV thresholds can
be individually controlled by adjusting the relevant divider.
The above example will give voltage thresholds of :
with VIN rising
UVr = VIN - Vtol + Vhys/2 = 11.5V and
OVr = VIN + Vtol + Vhys/2 = 13.5V
with VIN falling
Ovf = VIN + Vtol - Vhys/2 = 12.5V and
UVf = VIN - Vtol - Vhys/2 = 10.5V.
So with a single three resistor string, the resistor values can
be calculated as:
Rl = (VREF/Iload) (1 - Vtol/VIN)
Rm = 2(VREF x Vtol)/(VIN x Iload)
Ru = 1/Iload x (VIN - VREF (1+Vtol/VIN))
For the above example with Vtol = 0.99V, assuming a 100A
Iload at VIN = 12V:
Rl = 10.7k
Rm = 1.9k
Ru = 107.3k
Programming the ENABLE Output Delays
The delay timing between the four sequenced ENABLE outputs
are programmed with four external passive components. The
delay from a valid VIN (ISL8700 and ISL8701) to ENABLE_A
and SEQ_EN being valid (ISL8702, ISL8702A, ISL8703,
ISL8704, ISL8705) to ENABLE_A is determined by the value of
the capacitor on the TIME Pin to GND. The external TIME Pin
capacitor is charged with a 2.6A current source. Once the
voltage on TIME is charged up to the internal reference voltage,
(VTIME_VTH) the ENABLE_A output is released out of its reset
state. The capacitor value for a desired delay (±10%) to
ENABLE_A once VIN and SEQ_EN where applicable has been
satisfied is determined by:
CTIME = tVINSEQpd/770k
Once ENABLE_A reaches VTIME_VTH the TIME pin is pulled
low in preparation for a sequenced off signal via SEQ_EN. At
this time the sequencing of the subsequent outputs is started.
ENABLE_B is released out of reset after a programmable time,
then ENABLE_C, then ENABLE _D, all with their own
programmed delay times.
The subsequent delay times are programmed with a single
external resistor for each ENABLE output providing maximum
flexibility to the designer through the choice of the resistor value
connected from TB, TC and TD pins to GND. The resistor
values determine the charge and discharge rate of an internal
capacitor comprising an RC time constant for an oscillator
whose output is fed into a counter generating the timing delay
to ENABLE output sequencing.
The RTX value for a given delay time is defined as:
RTX
tdel
1667nF
---------------------
=
ISL8700, ISL8701, ISL8702, ISL8703, ISL8704, ISL8705
相關PDF資料 |
PDF描述 |
|---|---|
| ISL8703IBZT | DSP-ADDRESS SEQUENCER, PDSO14 |
| ISP1160BD-S | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| ISP1160BD/01,118 | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| ISP1160BD/01,151 | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| ISP1161A1BM,557 | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISL870XEVAL1 | 功能描述:EVAL BOARD 1 FOR ISL870X RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| ISL8723EVAL1 | 功能描述:EVAL BOARD 1 FOR ISL8723 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| ISL8723IRZ | 功能描述:IC POWER SUPPLY SEQUENCER 24QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL8723IRZR5369 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
| ISL8723IRZ-T | 功能描述:IC POWER SUPPLY SEQUENCER 24QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復。