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參數(shù)資料
| 型號： | ISL59832IRZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 4/14頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO FILTER CHRG PUMP 16TQFN |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 應(yīng)用： | 濾波器 |
| 電路數(shù)： | 2 |
| -3db帶寬： | 9MHz |
| 電流 - 電源： | 14mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（4x4） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1247 (CN2011-ZH PDF) |
| 其它名稱： | ISL59832IRZTR ISL59832IRZTR-ND |
12
FN6267.1
June 11, 2008
VEEOUT and VEEIN. See the Typical Application Circuit for
further information.
VEEOUT Pin
VEEOUT is the output pin for the charge pump. Keep in mind
that the output of this pin is a fully regulated supply that must
be properly bypassed. Bypass this pin with a 0.47F ceramic
capacitor placed as close to the pin and connected to the
ground plane of the board.
VEEIN Pin
VEEIN is the subtrate connection for the ISL59832. To
reduce the noise on the power supply generated by the
charge pump, connect a lowpass RC-network between
Circuit” on page 6 for further information.
Video Performance
DIFFERENTIAL GAIN/PHASE
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency and phase response as DC levels are changed at
the output. Special circuitry has been incorporated into the
ISL59832 to reduce the output impedance variation with the
current output. This results in outstanding differential gain
and differential phase specifications of 0.45% and 0.15°,
while driving 150
Ω at a gain of +2V/V.
NTSC
The ISL59832, generating a negative rail internally, is ideally
suited for NTSC video with its accompanying negative-going
sync signals.
S-VIDEO
For a typical S-video application, connect the luma signal to
Channel 1, and connect the chrominance signal to
Channel 2. For clamp timing connect SYNC_OUT to
SYNC_IN. See the “S-Video Typical Application Circuit” on
AC-Coupled Inputs
SYNC TIP CLAMP (CHANNEL 1)
The ISL59832 features a sync tip clamp that sets the black
level of the output video signal to ground. This ensures that
the sync-tip voltage level will be approximately -300mV at
the back-termination resistor of a standard video load. The
clamp is activated whenever the input voltage falls below 0V.
The correction voltage required to do this is stored across
the input AC-coupling capacitor. Refer to “S-Video Typical
Application Circuit” on page 6 for a detailed diagram.
KEYED CLAMP (CHANNEL 2)
Channel 2 has a keyed clamp which sets the output to
ground when SYNC_IN is driven to the logic high state.
SYNC_IN may be connected to SYNC_OUT which ensures
that Channel 2 clamps during the sync interval for Y-C
applications.
SYNC DETECTOR AND CLAMP TIMING
Channel 1 and Channel 3 also have sync detectors whose
outputs are available at SYNC_OUT.
The slice level for the sync detector is between 100 to
200mV. This means that if the signal level is below 100mV at
Channel 1, then SYNC_OUT is high. If the signal level is
above 200mV then SYNC_OUT is low. Figure 28 shows the
operation of the sync detector.
DC-Coupled Inputs (Channel 1)
When DC-coupling the inputs ensure that the lowest signal
level is greater than +50mV to prevent the clamp from
turning on and distorting the output. When DC-coupled the
ISL59832 shifts the signal by -620mV.
Amplifier Disable
The ISL59832 can be disabled and its outputs placed in high
impedance states. The turn-off time is around 10ns and the
turn-on time is around 35s. The turn-on time is longer
because extra time is needed for the charge pump to settle
before the amplifiers are enabled. When disabled, the device
supply current is reduced to 2A typically, reducing power
consumption. The device’s power-down can be controlled by
standard TTL or CMOS signal levels at the ENABLE pin.
The applied logic signal is relative to the GND pin. Applying
a signal that is less than 0.8V above GND will disable the
device. The device will be enabled when the ENABLE signal
is 2V above GND.
Output Drive Capability
The maximum output current for the ISL59832 is ±50mA.
Maximum reliability is maintained if the output current never
exceeds ±50mA, after which the electro-migration limit of the
process will be exceeded and the part will be damaged. This
limit is set by the design of the internal metal interconnections.
Driving Capacitive Loads and Cables
The ISL59832, internally-compensated to drive 75
Ω cables,
will drive 10pF loads in parallel with 150
Ω or 75Ω with less
than 1.3dB of peaking.
+300mV
+0mV
NTSC LUMINANCE
CHANNEL 1 INPUT
+1.00V
100mV < VSLICE < 200mV
+0mV
+3.3V
SYNC_OUT
FIGURE 28. SYNC DETECTOR SLICE LEVEL
ISL59832
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