7
Input Logic Low Voltage with
3.3V Supply, VIL
-
0
1.0
V
Sleep Input Current, IIH
-25
-
+25
A
Input Logic Current, IIH, IL
-20
-
+20
A
Clock Input Current, IIH, IL
-10
-
+10
A
Digital Input Capacitance, CIN
-3
-
pF
TIMING CHARACTERISTICS
Data Setup Time, tSU
-
1.5
-
ns
Data Hold Time, tHLD
-
1.5
-
ns
Propagation Delay Time, tPD
-
1
-
Clock
Period
CLK Pulse Width, tPW1, tPW2
2
-
ns
POWER SUPPLY CHARACTERISTICS
AVDD Power Supply
2.7
3.3
3.6
V
DVDD Power Supply
2.7
3.3
3.6
V
Analog Supply Current (IAVDD)
3.3V, IOUTFS = 20mA
-
60
62
mA
3.3V, IOUTFS = 2mA
-
24
-
mA
Digital Supply Current (IDVDD)
-
11
15
mA
-
17
21
mA
Supply Current (IAVDD) Sleep Mode
3.3V, IOUTFS = Don’t Care
-
5
-
mA
Power Dissipation
3.3V, IOUTFS = 20mA (Note
5)-
233
255
mW
3.3V, IOUTFS = 20mA (Note
6)-
253
274
mW
3.3V, IOUTFS = 2mA (Note
5)-
115
-
mW
Power Supply Rejection
-0.125
-
+0.125
%FSR/V
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 625A). Ideally the
ratio should be 32.
3. Parameter guaranteed by design or characterization and not production tested.
4. Spectral measurements made with differential transformer coupled output and no external filtering. For multitone testing, the same pattern was
used at different clock rates, producing different output frequencies but at the same ratio to the clock rate.
5. Measured with the clock at 130MSPS and the output frequency at 10MHz.
6. Measured with the clock at 200MSPS and the output frequency at 20MHz.
7. See “Definition of Specifications.”
8. Recommended operation is from 3.0V to 3.6V. Operation below 3.0V is possible with some degradation in spectral performance. Reduction in
analog output current may be necessary to maintain spectral performance.
9. See Typical Performance Plots.
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25°C for All Typical Values (Continued)
PARAMETER
TEST CONDITIONS
TA = -40°C TO 85°C
UNITS
MIN
TYP
MAX
ISL5929