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參數(shù)資料
| 型號(hào)： | ISL25700FRUZ-TK |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 3/18頁(yè) |
| 文件大?。?/td> | 441K |
| 描述： | IC TEMP SWITCH MFET DRVR 10TQFN |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器），溫度開關(guān) |
| 傳感器類型： | 外部 |
| 感應(yīng)溫度： | 40°C ~ 110°C 跳變點(diǎn) |
| 精確度： | ±3°C |
| 拓?fù)洌?/td> | 比較器，電壓基準(zhǔn) |
| 輸出類型： | 電壓 |
| 輸出警報(bào)： | 無 |
| 輸出風(fēng)扇： | 無 |
| 電源電壓： | 3 V ~ 15 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應(yīng)商設(shè)備封裝： | 10-UTQFN（2.1x1.6） |
| 包裝： | 帶卷 (TR) |
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ISL25700
3
FN6885.0
September 3, 2010
Pin Configuration
ISL25700
(10 LD 糡QFN)
TOP VIEW
9
8
7
6
1
2
3
4
R
TH
GND
ISENSE
VOUT
CCOMP
VDD
SDA
SCL
O
VDAC
NC
Pin Descriptions
糡QFN PIN
SYMBOL
DESCRIPTION
1
VDD
Power supply. This pins supplies the power necessary to operate the chip.
2
SCL
I
2
C interface input clock. This input is the serial clock of the I
2
C serial interface.
SCL requires an external pull-up resistor. It has an internal pull-down resistor of ~3M?to
prevent a floating input if the pin will be left unconnected.
3
SDA
Open Drain Serial Data Input/Output for the I
2
C interface. The SDA is a bidirectional serial
data input/output pin for I
2
C interface. It receives device address, operation code and data
from an I
2
C external master device at the rising edge of the serial clock SCL, and it shifts out
data after each falling edge of the serial clock.
The SDA pin requires an external pull-up resistor. It has an internal pull-down resistor of
~3M?to prevent a floating input if the pin will be left unconnected.
4
GND
Ground. Bias and reference ground of the chip.
5
R
TH
External NTC thermistor. An external NTC thermistor makes one shoulder of the Wheatstone
bridge and must be connected between the R
TH
pin and GND.
6
VDAC
DAC Output. This is the output of the precision 8-bit DAC. Default DAC output is in the range
of 0V to 2V. The DAC output range can be extended with a gain of 2 by setting the DAC Gain
bit.
7
VOUT
Output voltage that controls an external P-MOSFET. This pin drives an external P-MOSFET
proportional to unbalanced condition of the Wheatstone bridge.
8
ISENSE
Current Sense input. This pin monitors voltage drop over an external current sense resistor
RSENSE. Power dissipation of the P-MOSFET will be limited when ISENSE exceeds the voltage
drop limit set in the Current Sense Register.
9
CCOMP
Compensation capacitor. A compensation ceramic capacitor must be added between CCOMP
and GND to increase chip stability. This capacitor provides a negative feedback for the
operational amplifier and its value can be from 30pF to 1000pF.
10
NC
Not internally connected.
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