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參數(shù)資料
| 型號： | ISL25700FRUZ-TK |
| 廠商： | Intersil |
| 文件頁數(shù)： | 16/18頁 |
| 文件大小： | 441K |
| 描述： | IC TEMP SWITCH MFET DRVR 10TQFN |
| 標準包裝： | 1,000 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器），溫度開關 |
| 傳感器類型： | 外部 |
| 感應溫度： | 40°C ~ 110°C 跳變點 |
| 精確度： | ±3°C |
| 拓撲： | 比較器，電壓基準 |
| 輸出類型： | 電壓 |
| 輸出警報： | 無 |
| 輸出風扇： | 無 |
| 電源電壓： | 3 V ~ 15 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應商設備封裝： | 10-UTQFN（2.1x1.6） |
| 包裝： | 帶卷 (TR) |
ISL25700
16
FN6885.0
September 3, 2010
measures the phase change of the output node
(thermistor). As a rule of thumb, phase margin should be
at least 45?when the system gain reaches 0dB.
It is not recommended to change the system loop gain
when it is determined.
Calibration Procedure
Power-up the circuit and program Reg.01h[2:0] = 001b
of ISL25700. Use an externally calibrated temperature
sensor to measure the temperature of the thermistor.
When the thermistor temperature is stabilized, it can be
adjusted to the desired point by changing the Fine
Temperature Control settings in Reg.02h[7:0] until the
external thermometer indicates +91.5癈 (for this
example).
The decimal FTC code can be calculated by solving for
Equations 1 and 2 as follows:
Note, the final application system temperature depends
on the allowed power consumption and the level of
insulation from the ambient temperature.
Two different calibration point settings can be stored in
General Purpose non-volatile registers. More calibrated
temperature points can be stored and used as a look-up
table in an external memory.
Placement and Layout Consideration
It is recommended to place the ISL25700 and thermistor
as close as possible to each other, inside the insulated
area to achieve higher accuracy and keep the ground
trace between the thermistor and the device as short as
possible. The device ground pin and the system ground
should be connected at a single point, known as the
single point ground , preventing picking up the common
ground noise into the R
TH
feedback pin.
The ISL25700 also can be placed outside of the insulated
area and far away from the thermistor, but the setpoint
accuracy will decrease, due to the wide ambient
temperature range. It is recommended to use a look-up
table based on Equation 2 to compensate for the setpoint
shift.
Put a 1糉 capacitor in parallel with 0.1糉 decoupling
capacitor close to the VDD pin.
It is recommended to have a pull-up resistor of 500k or
higher, or a high-pass RC filter, as shown in the Block
Diagram/Application Circuit on page 2, to the gate of a
P-MOSFET in order to prevent a high current spike
through the MOSFET at power-up. The time constant of
the high-pass filter should be in the range of 1約 to 20約.
Code
K1 R
INT
T
( )
?/DIV>
K2 R
TH
T
( )
?/DIV>
K3 R
TH
T
( )
?/DIV>
----------------------------------------------------------------------------- 255
?/DIV>
=
(EQ. 3)
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