FN6316.1 July 15, 2010 General Description The ISL1221 device is a low power Real Time Clock with Security and Event function, Time Stamp" />
參數(shù)資料
型號(hào)： ISL1221IUZ
廠商： Intersil
文件頁(yè)數(shù)： 22/24頁(yè)
文件大小： 0K
描述： IC RTC LP BATT BACK SRAM 10MSOP
產(chǎn)品培訓(xùn)模塊： Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝： 980
類型： 時(shí)間事件記錄器
特點(diǎn)： 警報(bào)器，閏年，SRAM
存儲(chǔ)容量： 2B
時(shí)間格式： HH:MM:SS（12/24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 管件
7
FN6316.1
July 15, 2010
General Description
The ISL1221 device is a low power Real Time Clock with
Security and Event function, Time Stamp in both normal and
battery modes, timing and crystal compensation,
clock/calendar, power fail indicator, periodic or polled alarm,
intelligent battery backup switching, and battery-backed user
SRAM.
The Event Detection function can be used for tamper
detection, security or other chassis or generic system
monitoring. Upon a valid event detection, the ISL1221 sets
the Event Detection bit (EVT bit) in the status register, stores
time stamp information on board memory, and, can
optionally: 1) Issue an Event Output signal (EVDET pin), 2)
At the time the event occurred, stop the RTC registers from
advancing. The event monitor and time stamp functions in
both main VDD and battery back up modes. The event
monitor can also be configured for various input detection
rates to optimize power consumption for the application. In
addition, the Event Monitor pin (EVIN) has a selectable glitch
filter to avoid switch de-bouncing.
The oscillator uses an external, low-cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes, and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction.
The ISL1221's alarm can be set to any clock/calendar value
for a match. For example, every minute, every Tuesday or at
5:23 AM on March 21. The alarm status is available by
checking the Status Register, or the device can be
configured to provide a hardware interrupt via the IRQ pin.
There is a repeat mode for the alarm allowing a periodic
interrupt every minute, every hour, every day, etc.
The device also offers a backup power input pin. This VBAT
pin allows the device to be backed up by battery or
SuperCap with automatic switchover from VDD to VBAT. The
entire ISL1221 device is fully operational from VDD = 2.7V to
5.5V and the clock/calendar portion of the device remains
fully operational in battery backup mode down to 1.8V
(Standby Mode).
Pin Description
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the ISL1221 to supply a timebase for the real
time clock. Internal compensation circuitry provides high
accuracy over the operating temperature range from
-40°C to +85°C. This oscillator compensation network can
be used to calibrate the crystal timing accuracy over
temperature either during manufacturing or with an external
temperature sensor and microcontroller for active
compensation. The device can also be driven directly from a
32.768kHz source at pin X1.
FIGURE 7. EVIN IPULLUP vs VDD
FIGURE 8. IPULLUP vs TEMPERATURE AT VBAT = 1.8V
Typical Performance Curves Temperature is +25°C unless otherwise specified (Continued)
-40°C
+25°C
+85°C
8.00E-06
7.00E-06
6.00E-06
5.00E-06
4.00E-06
3.00E-06
2.00E-06
1.00E-06
0.00E-00
I PULL-UP
VDD
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
5.0E-07
4.0E-07
3.0E-07
2.0E-07
1.0E-07
-25
-40
-10
5
20
35
50
65
80
TEMPERATURE
I PULL-UP
FIGURE 9. STANDARD OUTPUT LOAD FOR TESTING THE
DEVICE WITH VDD = 5.0V
SDA
AND
IRQ/EVDET
1533
Ω
100pF
5.0V
FOR VOL= 0.4V
AND IOL = 3mA
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR VDD = 5V
ISL1221
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