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參數(shù)資料
| 型號： | IS42S16128-8T |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | Chassis Mount and Din Rail Filters RoHS Compliant: Yes |
| 中文描述： | 256K X 16 SYNCHRONOUS DRAM, 8 ns, PDSO50 |
| 封裝： | 0.400 INCH, TSOP2-50 |
| 文件頁數(shù)： | 32/75頁 |
| 文件大?。?/td> | 638K |
| 代理商： | IS42S16128-8T |
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32
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/13/00
IS42S16128
ISSI
Burst Data Interruption U/LDQM Pins
(Write Cycle)
Burst data input can be temporarily interrupted (muted )
during a write cycle using the U/LDQM pins. Regardless
of the
CAS
latency, as soon as one of the U/LDQM pins
goes HIGH, the corresponding externally applied input
data will no longer be written to the device internal circuits.
Subsequently, the corresponding input continues to be
muted as long as that U/LDQM pin remains HIGH.
The IS42S16128 will revert to accepting input as soon as
that pin is dropped to LOW and data will be written to the
device. This input control operates independently on a
byte basis with the UDQM pin controlling upper byte input
(pin I/O8 to I/O15) and the LDQM pin controlling the lower
byte input (pins I/O0 to I/O7).
Since the U/LDQM pins control the device input buffers
only, the cycle continues internally and, inparticular,
incrementing of the internal burst counter continues.
CAS
latency = 2, burst length = 4
Burst Read and Single Write
The burst read and single write mode is set up using the
mode register set command. During this operation, the
burst read cycle operates normally, but the write cycle
only writes a single data item for each write cycle. The
CAS
latency and DQM latency are the same as in normal
mode.
WRITE A0
COMMAND
UDQM
LDQM
I/O8-I/O15
I/O0-I/O7
CLK
D
IN
A1
WRITE (CA=A, BANK 0)
DATA MASK (LOWER BYTE)
DATA MASK (UPPER BYTE)
t
DMD=0
D
IN
A2
D
IN
A3
D
IN
A0
D
IN
A3
WRITE A0
COMMAND
I/O
CLK
D
IN
A0
WRITE (CA=A, BANK 0)
CAS
latency = 2, 3
Don
’
t Care
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PDF描述 |
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| IS42S16160B-7TL | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S16160B-7TLI | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B-6T | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B-6TL | 32Meg x 8, 16Meg x16 256-MBIT SYNCHRONOUS DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S16160A-6T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-6TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S16160A-7T | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS42S16160A-7TL | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS42S16160B | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256-MBIT SYNCHRONOUS DRAM |
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