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參數(shù)資料
| 型號： | IS41LV44004-50JI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 4M X 4 EDO DRAM, 50 ns, PDSO24 |
| 封裝： | 0.300 INCH, SOJ-24 |
| 文件頁數(shù)： | 16/19頁 |
| 文件大?。?/td> | 157K |
| 代理商： | IS41LV44004-50JI |
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/24/01
IS41C4400X
IS41LV4400X SERIES
ISSI
AC CHARACTERISTICS(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-50
-60
Symbol
Parameter
Min.
Max.
Min.
Max.
Units
tRC
Random READ or WRITE Cycle Time
84
—
104
—
ns
tRAC
Access Time from
RAS(6, 7)
—
50
—
60
ns
tCAC
Access Time from
CAS(6, 8, 15)
—
13
—
15
ns
tAA
Access Time from Column-Address(6)
—
25
—
30
ns
tRAS
RAS Pulse Width
50
10K
60
10K
ns
tRP
RAS Precharge Time
30
—
40
—
ns
tCAS
CAS Pulse Width(23)
8
10K
10
10K
ns
tCP
CAS Precharge Time(9)
9
—
9
—
ns
tCSH
CAS Hold Time (21)
38
—
40
—
ns
tRCD
RAS to CAS Delay Time(10, 20)
12
37
14
45
ns
tASR
Row-Address Setup Time
0
—
0
—
ns
tRAH
Row-Address Hold Time
8
—
10
—
ns
tASC
Column-Address Setup Time(20)
0
—
0
—
ns
tCAH
Column-Address Hold Time(20)
8
—
10
—
ns
tAR
Column-Address Hold Time
30
—
40
—
ns
(referenced to
RAS)
tRAD
RAS to Column-Address Delay Time(11)
10
25
12
30
ns
tRAL
Column-Address to
RAS Lead Time
25
—
30
—
ns
tRPC
RAS to CAS Precharge Time
5
—
5
—
ns
tRSH
RAS Hold Time
8
—
10
—
ns
tRHCP
RAS Hold Time from CAS Precharge
30
—
35
—
ns
tCLZ
CAS to Output in Low-Z(15, 24)
0
—
0
—
ns
tCRP
CAS to RAS Precharge Time(21)
5
—
5
—
ns
tOD
Output Disable Time(19, 24)
315
3
15
ns
tOE
Output Enable Time(15, 16)
—
12
—
15
ns
tOED
Output Enable Data Delay (Write)
12
—
15
—
ns
tOEHC
OE HIGH Hold Time from CAS HIGH
5
—
5
—
ns
tOEP
OE HIGH Pulse Width
10
—
10
—
ns
tOES
OE LOW to CAS HIGH Setup Time
5
—
5
—
ns
tRCS
Read Command Setup Time(17, 20)
0
—
0
—
ns
tRRH
Read Command Hold Time
0
—
0
—
ns
(referenced to
RAS)(12)
tRCH
Read Command Hold Time
0
—
0
—
ns
(referenced to
CAS)(12, 17, 21)
tWCH
Write Command Hold Time(17)
8
—
10
—
ns
tWCR
Write Command Hold Time
40
—
50
—
ns
(referenced to
RAS)(17)
tWP
Write Command Pulse Width(17)
8
—
10
—
ns
tWPZ
WE Pulse Widths to Disable Outputs
7
—
7
—
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS41LV44004-50T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM |
| IS41LV44004-50TI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM |
| IS41LV44004-60J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM |
| IS41LV44004-60JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM |
| IS41LV44004-60T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 EDO Page Mode DRAM |
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