參數(shù)資料
型號(hào): IRMCK203
廠商: International Rectifier
英文描述: High Performance Sensorless Motion Control IC
中文描述: 高性能運(yùn)動(dòng)控制芯片傳感器
文件頁(yè)數(shù): 15/57頁(yè)
文件大?。?/td> 400K
代理商: IRMCK203
IRMCK203
Implementing the Low Pass Filter Shield
Make all connections between CHGO, Rp, Cp, Cs and LPVSS as short as possible. Create the underlining shield by
“copper filling” a larger area in the signal plane of the PCB. Connect this shield to the LPVSS pin of the IC. Do
not connect this shield to signal ground (VSS).
Cp Rp and Cs Component Values
For a typical FR4 PCB, the values of the passive components are shown in Table 3.
Component
Value
Rp
Cp
Cs
Not Installed
Table 3: PLL Low Pass Filter Values
PLL Reset
There are two reset pins on the IC, XPD and RESETN both low true. XPD holds the PLL circuitry in reset when
low. Upon XPD going high, the PLL circuitry begins to lock onto the 33.33 MHz clock input. The PLL circuit
may take up to 1 msec to become stable. RESETN asserted low holds the internal DSP logic in reset. Upon
RESETN going high, the IC digital logic becomes active.
RESET should be held low during and at least 1 ms after XPD goes high false to hold the internal logic in reset while
the PLL becomes stable.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
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