參數(shù)資料
型號(hào): IRMCK203
廠商: International Rectifier
英文描述: High Performance Sensorless Motion Control IC
中文描述: 高性能運(yùn)動(dòng)控制芯片傳感器
文件頁數(shù): 10/57頁
文件大?。?/td> 400K
代理商: IRMCK203
IRMCK203
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
10
Motion Peripheral Group
Signal
Input (I) /
Output (O)
Low (L) /
High (H) True
Asserted
Function
PWMUH
PWMUL
PWMVH
PWHVL
PWMWH
PWMWL
BRAKE
O
O
O
O
O
O
O
PWM phase U high side
PWM phase U low side
PWM phase V high side
PWM phase V low side
PWM phase W high side
PWM phase W low side
IGBT gate
-
L
GATEKILL
I
Varies, Based on
Write Register
0x0C Bit 7
-
-
When asserted, negates all six
PWM signals, host writeable
IFB0
IFB1
I
I
Channel 0 (phase V)
Channel 1 (phase W)
Analog Interface Group
Signal
Input (I) /
Output (O)
Low (L) /
High (H) True
Asserted
Negative Edge
Sensitive
-
-
L
Function
ADCLK
O
Clock to ADS7818
ADOUT
DAC [3:0]
ADCONVST
I
O
O
Serial data from ADS7818
Diagnostic DAC
Conversion start to ADS7818
Sample/hold control signal
channel 0 A/D converter
Analog input MUX select
Analog input MUX select
RESSAMPLE
O
ADMUX0
ADMUX1
O
O
H
H
PLL Interface Group
Signal
Input (I) /
Output (O)
Low (L) /
High (H) True
Asserted
L
L
Function
XPD
RESETN
I
I
PLL reset
Digital logic reset
Internal test pin – force to logic
low
Internal test pin – force to logic
low
33.33 MHz crystal input
33.33 MHz crystal input
Internal test pin – force to logic
low
Low pass filter
Low pass filter ground
BYPASSCLK
I
H
BYPASSMODE
I
H
OSC1CLK
OSC2CLK
I
I
-
-
PLLTEST
I
H
CHGO
LPVSS
I/O
I/O
-
-
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