參數(shù)資料
型號(hào)： IQX320-15PP391
英文描述： User Programmable Special Function ASIC
中文描述： 用戶可編程ASIC的特殊功能
文件頁(yè)數(shù)： 20/65頁(yè)
文件大?。?/td> 620K
代理商： IQX320-15PP391
IQX Family Data Sheet
20
Revision 5.0
June 2000
CKES0
3
0
Clock Enable Group
1
Clock Enable (CKE) Source Bit 0 (LSB).
CKES1
1
1
Clock Enable (CKE) Source Bit 1.
CKES2
2
1
Clock Enable (CKE) Source Bit 2.
CKES3
3
1
Clock Enable (CKE) Source Bit 3 (MSB).
INV_CKE
4
1
Invert Polarity for Clock Enable; Default is enabled when high for Register and transparent when
High for Latch.
INV_CLK
5
0
Invert Polarity for Clock; Default is Rising Edge Triggered for Register and Transparent when
High for Latch.
INV_PI
6
0
Invert Input Data in Registered Input (RI) mode.
reserved
7
0
Reserved for internal use. Must be set to default value.
K0
4
0
Key Control and
Pipeline Delay Group
0
Key Tag Bit 0 (LSB).
K1
1
0
Key Tag Bit 1.
K2
2
0
Key Tag Bit 2.
K3
3
0
Key Tag Bit 3.
K4
4
0
Key Tag Bit 4 (MSB).
DELAY0
5
0
Input Pipeline Delay Bit 0 (LSB).
DELAY1
6
0
Input Pipeline Delay Bit 1.
DELAY2
7
0
Input Pipeline Delay Bit 2 (MSB).
BR
5
0
Misc. Group
0
Bus Repeater Mode.
IAS
1
1
Array Side Trickle Current.
IPS
2
1
Pin Side Trickle Current.
PU_WK
3
0
Weak Static Pull Up Current.
PU_SG
4
0
Strong Static Pull Up Current.
NB
5
0
Non-Buffered Mode.
reserved
6
1
Reserved for internal use. Must be set to default value.
reserved
7
1
Reserved for internal use. Must be set to default value.
reserved
6
0
Test Group
0
Reserved for internal use. Must be set to default value.
reserved
1
0
Reserved for internal use. Must be set to default value.
Name
Seg#
Bit#
Group Function
Reset
Value
Description
Table 6. I/O Port Configuration Bits (Continued)
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