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參數(shù)資料
| 型號(hào)： | IMC024FLSG |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 5 V Series 200 Flash Memory Card(5V系列200閃速存儲(chǔ)器插卡) |
| 中文描述： | 16M X 16 FLASH 5V PROM CARD, 200 ns, XMA |
| 封裝： | PC CARD |
| 文件頁數(shù)： | 27/35頁 |
| 文件大小： | 217K |
| 代理商： | IMC024FLSG |
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E
8.4
iMC008/016/024/032/048/064FLSG
27
PRELIMINARY
DC Characteristics
(Continued)
Test
Sym
Parameter
Notes
Min
Max
Unit
Conditions
V
IL
Input Low Voltage
–0.5
0.8
V
V
IH
Input High Voltage
0.7 V
CC
CC
+ 0.5
V
V
OL
Output Low Voltage
0.45
V
V
CC
= V
CC
Min, I
OL
= 5.8 mA
V
OH
Output High Voltage
0.85 V
CC
V
V
CC
= V
CC
Min, I
OH
= –2.5 mA
V
CC
– 0.4
V
CC
= V
CC
Min, I
OH
= –100 μA
V
LKO
V
CC
Lockout Voltage
3.25
V
NOTES:
1.
All currents are in RMS unless otherwise noted. These currents are valid for all product versions (speeds). Contact Intel’s
Application Support Hotline or your local sales office for information about typical specifications.
I
CCES
is specified with the card’s memory de-selected. If read or word write occurs while in erase suspend mode, the card’s
current draw is the sum of I
CCES
and either I
CCR
(read) or I
CCW
(write).
CMOS inputs are either V
CC
± 0.2 V or GND ± 0.2 V.
Exceptions: With V
IN
= GND, the leakage current on CE
1
#, CE
2
# will be < 50
μ
A each due to internal pull-up resistors.
2.
3.
4.
TEST POINTS
INPUT
OUTPUT
1.5
3.0
0.0
1.5
0581_06
NOTE:
1. AC test inputs are driven at 3.0V for a Logic “1” and 0.0
V for a Logic “0.” Input timing begins, and output timing
ends, at 1.5 V. Input rise and fall times (10% to 90%) <
10 ns.
Figure 3. Transient Input/Output Reference
Waveform for V
CC
= 5 V ± 5%
(Standard Test Configuration)
Device
Under Test
Out
R
L
= 3.3 k
1N914
1.3V
C
L
NOTE:
C
L
Includes Jig Capacitance
Figure 4. Transient Equivalent Testing
Load Circuit
Test Configuration Capacitance Loading Value
Test Configuration
C
L
(pF)
V
CC
= 5.0 V
±
5%
100
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