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參數(shù)資料
| 型號： | IDTCSPF2510CPGG |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 3.3V PHASE-LOCK LOOP CLOCK DRIVER |
| 中文描述： | 3.3鎖相環(huán)時鐘驅(qū)動器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 68K |
| 代理商： | IDTCSPF2510CPGG |
1
IDTCSPF2510C
3.3V PHASE-LOCK LOOP CLOCK DRIVER
0oC TO 85oC TEMPERATURE RANGE
2002 Integrated Device Technology, Inc.
DSC-5409/6
c
0oC T O 85oC T EMPERAT URE RANGE
AUGUS T 2002
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution for Synchronous DRAM
Applications
Distributes one clock input to one bank of ten outputs
Output enable bank control
External feedback (FBIN) pin is used to synchronize the output
to the clock input signal
On-chip series damping resistors with each driver
No external RC network required for PLL loop stability
Operates at 3.3V V
DD
tpd Phase Error at 133MHz: < ±150ps
Jitter (cycle-cycle)(peak-to-peak) at 66MHz to 133MHz: |70 |ps
Spread Spectrum Compatible
Operating frequency 25MHz to 140MHz
Fully conforms to PC133 specifications
Available in 24-Pin TSSOP package
IDTCSPF2510C
3.3V PHASE-LOCK LOOP
CLOCK DRIVER
21
Y9
PLL
3
5
8
9
4
Y0
Y1
Y2
Y3
Y4
15
17
20
16
Y5
Y6
Y7
Y8
24
13
23
AV
DD
FBIN
CLK
G
11
12
FBOUT
DESCRIPTION:
The IDTCSPF2510C is a high performance, low-skew, low-jitter,
phase-lock loop (PLL) clock driver. It uses a PLL to precisely align, in both
frequency and phase, the feedback (FBOUT) output to the clock (CLK) input
signal. It is specifically designed for use with synchronous DRAMs. The
CSPF2510C operates at 3.3V and provides integrated series-damping
resistors that make it ideal for driving point-to-point loads, single or dual.
One bank of ten outputs provide low-skew, low-jitter copies of CLK. Output
signal duty cycles are adjusted to 50 percent, independent of the duty cycle
at CLK. The outputs can be enabled or disabled via the control G input. When
the G input is high, the outputs switch in phase and frequency with CLK; when
the G input is low, the outputs are disabled to the logic-low state.
Unlike many products containing PLLs, the CSPF2510C does not require
external RC networks. The loop filter for the PLL is included on-chip,
mnimzing component count, board space, and cost.
Because it is based on PLL circuitry, the CSPF2510C requires a
stabilization time to achieve phase lock of the feedback signal to the reference
signal. This stabilization time is required, following power up and application
of a fixed-frequency, fixed-phase signal at CLK, as well as following any
changes to the PLL reference or feedback signals. The PLL can be
bypassed for the test purposes by strapping AV
DD
to ground.
The CSPF2510C is characterized for operation from0°C to +85°C. This
device is also available (on special order) in Industrial (-40°C to +85°C)
temperatures. See Ordering Information for more details.
FUNCTIONAL BLOCK DIAGRAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDTCSPF2510CPGGI | 3.3V PHASE-LOCK LOOP CLOCK DRIVER |
| IDTCSPF2510CPGI | 3.3V PHASE-LOCK LOOP CLOCK DRIVER |
| IDTCV107E | CLP SINE |
| IDTCV109E | CLOCK GENERATOR FOR DESKTOP PC PLATFORMS |
| IDTCV109EPV | CMOS/TTL Compatible |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDTCSPF2510CPGGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V PHASE-LOCK LOOP CLOCK DRIVER |
| IDTCSPF2510CPGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V PHASE-LOCK LOOP CLOCK DRIVER |
| IDTCSPT855PG | 功能描述:IC PLL CLK DRIVER 2.5V 28-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| IDTCSPT855-PG | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 60MHz to 220MHz 28-Pin TSSOP Tube |
| IDTCSPT855PG8 | 功能描述:IC PLL CLK DRIVER 2.5V 28-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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