參數(shù)資料
型號: IDT82V2042EPFG8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 5/83頁
文件大?。?/td> 0K
描述: IC LIU T1/J1/E1 2CH SHORT 80TQFP
標(biāo)準(zhǔn)包裝: 750
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-TQFP(14x14)
包裝: 帶卷 (TR)
其它名稱: 82V2042EPFG8
IDT82V2042E
DUAL CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
PIN DESCRIPTION
13
December 12, 2005
SCLK
PATT11
I
46
SCLK: Shift Clock
In serial microcontroller interface mode, this signal is the shift clock for the serial interface. Configuration data on SDI pin is
sampled on the rising edge of SCLK. Configuration and status data on SDO pin is clocked out of the device on the rising edge
of SCLK if SCLKE pin is low, or on the falling edge of SCLK if SCLKE pin is high.
In parallel non-multiplexed interface mode, this pin should be connected to ground.
PATT11/PATT10: Transmit pattern select for channel 1
In hardware control mode, this pin selects the transmit pattern
00 = normal
01= All Ones
10= PRBS
11= transmitter power down
SCLKE
DS
RD
PATT10
I
45
SCLKE: Serial Clock Edge Select
In serial microcontroller interface mode, this signal selects the active edge of SCLK for outputting SDO. The output data is
valid after some delay from the active clock edge. It can be sampled on the opposite edge of the clock. The active clock edge
which clocks the data out of the device is selected as shown below:
DS: Data Strobe
In Motorola parallel non-multiplexed interface mode, this signal is the data strobe of the parallel interface. In a write operation
(R/W = 0), the data on D[7:0] is sampled into the device. In a read operation (R/W = 1), the data is driven to D[7:0] by the
device.
RD: Read Strobe
In Intel parallel non-Multiplexed interface mode, the data is driven to D[7:0] by the device during low level of RD in a read oper-
ation.
PATT11/PATT10: Transmit pattern select for channel 1
See above PATT11.
SDI
R/W
WR
LP21
I
44
SDI: Serial Data Input
In serial microcontroller interface mode, this signal is the input data to the serial interface. Configuration data at SDI pin is sam-
pled by the device on the rising edge of SCLK.
R/W: Read/Write Select
In Motorola parallel non-multiplexed interface mode, this pin is low for write operation and high for read operation.
WR: Write Strobe
In Intel parallel non-multiplexed interface mode, this pin is asserted low by the microcontroller to initiate a write cycle. The data
on D[7:0] is sampled into the device in a write operation.
LP21/LP20: loopback mode select for channel 2
When the chip is configured by hardware, this pin is used to select loopback operation modes for channel 2 (Inband Loopback
is not provided in hardware control mode).
00 = no loopback
01 = analog loopback
10 = digital loopback
11 = remote loopback
Table-1 Pin Description (Continued)
Name
Type
Pin No.
Description
SCLKE
SCLK
Low
Rising edge is the active edge.
High
Falling edge is the active edge.
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