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參數(shù)資料
| 型號(hào)： | IDT82V2041EPP |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 29/75頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/J1/E1 1CH 44-TQFP |
| 標(biāo)準(zhǔn)包裝： | 80 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 3.13 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤(pán) |
| 其它名稱： | 82V2041EPP |
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IDT82V2041E
SINGLE CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT
Functional Description
35
December 9, 2005
3.12 MICROCONTROLLER INTERFACES
The microcontroller interface provides access to read and write the reg-
isters in the device. The chip supports serial microcontroller interface and
two kinds of parallel microcontroller interface: Motorola multiplexed mode
and Intel multiplexed mode. Different microcontroller interfaces can be
selected by setting MODE[1:0] pins to different values. Refer to MODE1
and MODE0 in pin description and Microcontroller Interface Timing Char-
acteristics for details.
3.12.1 PARALLEL MICROCONTROLLER INTERFACE
The interface is compatible with Motorola or Intel microcontroller. When
MODE[1:0] pins are set to ‘10’, Parallel-Multiplexed-Motorola interface is
selected. When MODE[1:0] pins are set to ‘11’, Parallel-Multiplexed-Intel
Interface is selected.
3.12.2 SERIAL MICROCONTROLLER INTERFACE
When MODE[1:0] pins are set to ‘01’, Serial Interface is selected. In this
mode, the registers are programmed through a 16-bit word which contains
an 8-bit address/command byte (5 address bits A0~A4 and bit R/W) and
an 8-bit data byte (D0~D7). When bit R/W is ‘1’, data is read out from pin
SDO. When bit R/W is ‘0’, data is written into SDI pin. Refer to Figure-19.
Figure-19 Serial Microcontroller Interface Function Timing
3.13 INTERRUPT HANDLING
All kinds of interrupt of the IDT82V2041E are indicated by the INT pin.
When the INT_PIN[0] bit (GCF, 02H) is ‘0’, the INT pin is open drain active
low, with a 10 K
external pull-up resistor. When the INT_PIN[1:0] bits
(GCF, 02H) are ‘01’, the INT pin is push-pull active low; when the
INT_PIN[1:0] bits are ‘10’, the INT pin is push-pull active high.
An active level on the INT pin represents an interrupt of the
IDT82V2041E.
The interrupt event is captured by the corresponding bit in the Interrupt
Status Register (INTS0, 19H) or (INTS1, 1AH). Every kind of interrupt can
be enabled/disabled individually by the corresponding bit in the register
(INTM0, 14H) or (INTM1, 15H). Some event is reflected by the correspond-
ing bit in the Status Register (STAT0, 17H) or (STAT1, 18H), and the Inter-
rupt Trigger Edge Selection Register can be used to determine how the
Status Register sets the Interrupt Status Register.
AftertheInterruptStatusRegister(INTS0,19H)or(INTS1,1AH)isread,
the INT pin become inactive.
There are totally thirteen kinds of events that could be the interrupt
source:
(1).LOS Detected
(2).AIS Detected
(3).Driver Failure Detected
(4).TCLK Loss
(5).Synchronization Status of PRBS
(6).PRBS Error Detected
(7).Code Violation Received
(8).Excessive Zeros Received
(9).JA FIFO Overflow/Underflow
(10).Inband Loopback Code Status
(11).One-Second Timer Expired
(12).Error Counter Overflow
(13).Arbitrary Waveform Generator Overflow
Table-18 is a summary of all kinds of interrupt and the associated Status
bit, Interrupt Status bit, Interrupt Trigger Edge Selection bit and Interrupt
Mask bit.
R/W
A0
A1
A2
A3
A4
-
D1 D2
D3
D4
D5
D6
D7
CS
SCLK
SDI
address/command byte
input data byte (R/W=0)
D0
D1
D2
D3
D4
D5
D6
D7
remains high impedance
SDO
output data byte (R/W=1)
D0
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| IDT82V2041EPP8 | 功能描述:IC LIU T1/J1/E1 1CH 44-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
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