
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
Programming Information
85
December 7, 2005
INTCH4 - Interrupt Requisition Source Register 4
INTTM - One Second Timer Interrupt Status Register
5.2.2
PER-CHANNEL REGISTER
CHCF - Channel Configuration Register
Address: 380H
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7
INT_CH0
This bit indicates whether there is an interrupt generated in channel 0.
0: No interrupt is generated or all the interrupts are cleared in channel 0. (default)
1: At least one interrupt is generated in channel 0.
6 - 0
-
Reserved.
Address: 3C0H
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7 - 1
-
Reserved.
0
TMOV_IS
This bit is valid only when the TMOV_IM bit (b0,
GCF) is ‘0’. This bit indicates the interrupt status of one second time over.
0: No one second time over interrupt is generated; or a ‘1’ is written to this bit. (default)
1: One second time over interrupt is generated and is reported by the INT pin.
7654
321
0
INT_CH0
-
-----
-
7
654
321
0
--
---
--
TMOV_IS
Address: 001H, 041H, 081H, 0C1H, 101H, 141H, 181H, 1C1H, (CH1~CH8)
201H, 241H, 281H, 2C1H, 301H, 341H, 381H, 3C1H, (CH9~CH16)
401H, 441H, 481H, 4C1H, 501H, (CH17~CH21)
7C1H (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7 - 2
-
Reserved.
1
CHRST
Writing a ‘1’ to this bit will initiate per-channel software reset. Once initiated, per-channel software reset completes in 1 s maxi-
mum.
This bit is self cleared.
0-
Reserved.
76
54
3
2
1
0
--
-
CHRST
-