參數(shù)資料
型號： IDT821054APF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 編解碼器
英文描述： QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
中文描述： A/MU-LAW, PCM CODEC, PQFP64
封裝： TQFP-64
文件頁數(shù)： 25/42頁
文件大小： 512K
代理商： IDT821054APF
25
IDT821054A QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE INDUSTRIAL TEMPERATURE
GREG10: SB1 Direction Control and SB1 Status/Control Data, Read/Write (29H/A9H)
The SB1 direction control bits SB1C[3:0] in this register determine the directions of the SB1 pins of Channel 4 to Channel 1 respectively.
SB1C[0] = 0:
the SB1 pin of Channel 1 is configured as input (default);
SB1C[0] = 1:
the SB1 pin of Channel 1 is configured as output;
SB1C[1] = 0:
the SB1 pin of Channel 2 is configured as input (default);
SB1C[1] = 1:
the SB1 pin of Channel 2 is configured as output;
SB1C[2] = 0:
the SB1 pin of Channel 3 is configured as input (default);
SB1C[2] = 1:
the SB1 pin of Channel 3 is configured as output;
SB1C[3] = 0:
the SB1 pin of Channel 4 is configured as input (default);
SB1C[3] = 1:
the SB1 pin of Channel 4 is configured as output.
When the SB1 pins of Channel 1 to Channel 4 are configured as inputs, the SB1[0] to SB1[3] bits contain the status of these four SB1
pins respectively. When the SB1 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB1
pins via the SB1[0] to SB1[3] bits respectively.
GREG11: SB2 Direction Control and SB2 Status/Control Data, Read/Write (2AH/AAH)
The SB2 direction control bits SB2C[3:0] in this register determine the directions of the SB2 pins of Channel 4 to Channel 1 respectively.
SB2C[0] = 0:
the SB2 pin of Channel 1 is configured as input (default);
SB2C[0] = 1:
the SB2 pin of Channel 1 is configured as output;
SB2C[1] = 0:
the SB2 pin of Channel 2 is configured as input (default);
SB2C[1] = 1:
the SB2 pin of Channel 2 is configured as output;
SB2C[2] = 0:
the SB2 pin of Channel 3 is configured as input (default);
SB2C[2] = 1:
the SB2 pin of Channel 3 is configured as output;
SB2C[3] = 0:
the SB2 pin of Channel 4 is configured as input (default);
SB2C[3] = 1:
the SB2 pin of Channel 4 is configured as output.
When the SB2 pins of Channel 1 to Channel 4 are configured as inputs, the SB2[0] to SB2[3] bits contain the status of these four SB2
pins respectively. When the SB2 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB2
pins via the SB2[0] to SB2[3] bits respectively.
GREG12: SB3 Direction Control and SB3 Status/Control Data, Read/Write (2BH/ABH)
The SB3 direction control bits SB3C[3:0] in this register determine the directions of the SB3 pins of Channel 4 to Channel 1 respectively.
SB3C[0] = 0:
the SB3 pin of Channel 1 is configured as input (default);
SB3C[0] = 1:
the SB3 pin of Channel 1 is configured as output;
SB3C[1] = 0:
the SB3 pin of Channel 2 is configured as input (default);
SB3C[1] = 1:
the SB3 pin of Channel 2 is configured as output;
SB3C[2] = 0:
the SB3 pin of Channel 3 is configured as input (default);
SB3C[2] = 1:
the SB3 pin of Channel 3 is configured as output;
SB3C[3] = 0:
the SB3 pin of Channel 4 is configured as input (default);
SB3C[3] = 1:
the SB3 pin of Channel 4 is configured as output.
When the SB3 pins of Channel 1 to Channel 4 are configured as inputs, the SB3[0] to SB3[3] bits contain the status of these four SB3
b7
b6
b5
b4
b3
b2
b1
b0
Command
R
/W
0
1
0
1
0
0
1
I/O data
SB1C[3]
SB1C[2]
SB1C[1]
SB1C[0]
SB1[3]
SB1[2]
SB1[1]
SB1[0]
b7
b6
b5
b4
b3
b2
b1
b0
Command
R
/W
0
1
0
1
0
1
0
I/O data
SB2C[3]
SB2C[2]
SB2C[1]
SB2C[0]
SB2[3]
SB2[2]
SB2[1]
SB2[0]
b7
b6
b5
b4
b3
b2
b1
b0
Command
R
/W
0
1
0
1
0
1
1
I/O data
SB3C[3]
SB3C[2]
SB3C[1]
SB3C[0]
SB3[3]
SB3[2]
SB3[1]
SB3[0]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT821054APF8 功能描述:IC PCM CODEC QUAD MPI 64-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
IDT821054APFG 功能描述:IC PCM CODEC QUAD MPI 64-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
IDT821054APFG8 功能描述:IC PCM CODEC QUAD MPI 64-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
IDT821054PQF 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
IDT821054PQFG 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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