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參數(shù)資料
| 型號： | IDT74LVCH2245AQ |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | QSOP-20 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 73K |
| 代理商： | IDT74LVCH2245AQ |
INDUSTRIALTEMPERATURERANGE
IDT74LVCH2245A
3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1
JANUARY 2004
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2004 Integrated Device Technology, Inc.
DSC-4937/4
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
Balanced Output Drivers: ±12mA (B Port)
High Output Drivers: ±24mA (A Port)
IDT74LVCH2245A
DESCRIPTION:
This bus transceiver is built using advanced dual metal CMOS technol-
ogy. The LVCH2245A device is designed for asynchronous communica-
tion between data buses. The device transmits data from the A bus to the
B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (
OE) input can be used to
disable the device so the buses are effectively isolated.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V environment.
The LVCH2245A has series resistors in the output structure of the “B”
port, which will significantly reduce line noise when used with light loads. The
driver has been designed to drive ±12mA at the designated threshold
levels. The "A" port has a ±24mA driver.
The LVCH2245A has “bus-hold” which retains the inputs' last state
whenever the input goes to a high-impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS OCTAL BUS
TRANSCEIVER WITH 3-STATE
OUTPUTS, 5 VOLT TOLERANT I/O,
AND BUS-HOLD
DIR
A1
B1
OE
1
2
19
18
TO SEVEN OTHER CHANNELS
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-rail output swing for increased noise margin
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SOIC and QSOP packages
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