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參數(shù)資料
| 型號(hào)： | IDT74LVC652ASO8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 1.27 MM PITCH, SOIC-24 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 93K |
| 代理商： | IDT74LVC652ASO8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVC652A
3.3VCMOSOCTALBUSTRANSCEIVERANDREGISTER
1
APRIL 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4620/2
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
Rail-to-rail output swing for increased noise margin
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SOIC, SSOP, QSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC652A
DESCRIPTION:
The LVC652A octal bus transceiver/register is built using advanced dual
metal CMOS technology. The device consists of a bus transceiver circuit,
D-typeflip-flops,andcontrolcircuitryarrangedformultiplexedtransmission
of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and OEBA) inputs are provided to control the
transceiver functions. Select-control (SAB and SBA) inputs are provided
to select whether real-time or stored data is transferred. The circuitry used
for select control eliminates the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time data. A low
input selects real-time data, and a high input selects stored data.
Data on the A or B data bus, or both, is stored in the internal D-type flip-
flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA)
inputs, regardless of the select- or enable-control pins. When the SAB and
SBA are in the real-time transfer mode, it is possible to store data without
using the internal D-type flip-flops by simultaneously enabling OEAB and
OEBA. In this configuration, each output reinforces its input.
The LVC652A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
3.3V CMOS OCTAL BUS
TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
TO SEVEN OTHER CHANNELS
B1
B REG
D
C
A REG
D
C
A1
SAB
SBA
23
22
1
2
4
20
CLKAB
CLKBA
OEAB
OEBA
3
21
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