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參數(shù)資料
| 型號(hào)： | IDT74ALVCHG162280DF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 16-BIT EXCHANGER, TRUE OUTPUT, PDSO80 |
| 封裝： | TVSOP-80 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 92K |
| 代理商： | IDT74ALVCHG162280DF |
1
COMMERCIALTEMPERATURERANGE
IDT74ALVCHG162280
3.3V CMOS 16-BIT TO 32-BIT REGISTERED BUS EXCHANGER
CLK
SEL
1
B1
C1
1D
CE
1D
C1
CE
A1
2
B1
1 of 16 Channels
39
40
19
18
29
OE
42
0
1
C1
1D
DIR
41
CE
1D
C1
CE
1D
C1
NO
T RECOMMENDED
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
FOR
NEW
DESIGNS
JULY 2000
1999
Integrated Device Technology, Inc.
DSC-4559/-
c
IDT74ALVCHG162280
COMMERCIAL TEMPERATURE RANGE
FUNCTIONAL BLOCK DIAGRAM (A and B ports)
3.3V CMOS 16-BIT TO 32-BIT
REGISTERED BUS EXCHANGER
WITH BYTE MASKS, 3-STATE
OUTPUTS, AND BUS-HOLD
DESCRIPTION:
This 16-bit to 32-bit registered bus exchanger is manufactured using
advanced dual metal CMOS technology. The ALVCHG162280 is intended
for use in applications in which data must be transferred from a narrow high-
speed bus to a wide lower-frequency bus.
APPLICATIONS:
SDRAM Modules
PC Motherboards
Workstations
The device provides synchronous data exchange between the two
ports. Data is stored in the internal registers on the low-to-high transition of
the clock (CLK) input. For data transfer in the B-to-A direction, the select
(SEL) input selects 1B or 2B data for the A outputs. For data transfer in the
A-to-Bdirection,atwo-stagepipelineisprovidedinthe1Bpath,withasingle
storage register in the 2B path. Data flow is controlled by the active-low
output enable (OE) and the direction-control (DIR) inputs. The DIR control
pin is registered to synchronize the bus direction changes with the clock.
Two mask bits are provided for both data bytes. The data (D) outputs are
controlled by OE .
A port outputs have equivalent 50
seriesresistors.Bportoutputshave
equivalent 20
series resistors.
The switching characteristics in this spec, are based on 25pF (A Port)
and 80pF (B and D Ports) loads, but production test is accomplished with
the standard 50pF load.
The ALVCHG162280 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
FEATURES:
– 0.5 MICRON CMOS Technology
–Typical tSK(0) (Output Skew) < 250ps
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.40mm pitch TVSOP package
– Commercial range of 0°C to +70°C
–VCC = 3.3V ± 0.3V, Normal Range
– CMOS power levels (0.4W typ. static)
– Rail-to-Rail output swing for increased noise margin
– Low switching noise
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| IDT74ALVCHG162282DF | ALVC/VCX/A SERIES, 18-BIT EXCHANGER, TRUE OUTPUT, PDSO80 |
| IDT74ALVCHG162282DF8 | ALVC/VCX/A SERIES, 18-BIT EXCHANGER, TRUE OUTPUT, PDSO80 |
| IDT74ALVCHR16260PF8 | ALVC/VCX/A SERIES, 12 MULTIPLEXER AND DEMUX/DECODER, PDSO56 |
| IDT74ALVCHR16260PA | ALVC/VCX/A SERIES, 12 MULTIPLEXER AND DEMUX/DECODER, PDSO56 |
| IDT74ALVCHR16409PF | ALVC/VCX/A SERIES, 18-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
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