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參數(shù)資料
| 型號(hào)： | IDT74ALVCH374PG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.65 MM PITCH, TSSOP-20 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 62K |
| 代理商： | IDT74ALVCH374PG |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH374
3.3VCMOSOCTALPOSITIVEEDGE-TRIGGEREDD-TYPEFLIP-FLOP
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4473/1
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in QSOP, SOIC, SSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for Heavy Loads
IDT74ALVCH374
3.3V CMOS OCTAL POSITIVE
EDGE-TRIGGERED D-TYPE
FLIP-FLOP WITH 3-STATE
OUTPUTS AND BUS-HOLD
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
DESCRIPTION:
This octal postive edge-triggered D-type flip-flop is built using advanced
dual metal CMOS technology. The ALVCH374 device is particularly
suitableforimplementingbufferregisters,I/Oports,bidirectionalbusdrivers,
and working registers. On the positive transition of the clock (CLK) input, the
Q outputs are set to the logic levels at the data (D) inputs.
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide
the capability to drive bus lines without interface or pullup components. OE
does not affect internal operations of the latch. Old data can be retained or
new data can be entered while the outputs are in the high-impedance state.
The ALVCH374 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH374 has a “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
1
Q
11
2
OE
TO SEVEN OTHER CHANNELS
1
CLK
1
D
C1
1
D
3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74ALVCHR162245PA | 制造商: 功能描述: 制造商:Integrated Device Technology Inc 功能描述: 制造商:undefined 功能描述: |
| IDT74ALVCHR162245PA/TR | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74ALVCHR162245PAG | 功能描述:IC TRANSCVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器 系列:74ALVCHR 標(biāo)準(zhǔn)包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動(dòng)器，非反相 元件數(shù):4 每個(gè)元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:管件 |
| IDT74ALVCHR162245PAG8 | 功能描述:IC TRANSCVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器 系列:74ALVCHR 標(biāo)準(zhǔn)包裝:1 系列:74LVCR 邏輯類型:收發(fā)器，非反相 元件數(shù):1 每個(gè)元件的位元數(shù):8 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-VQFN-EP（3.5x4.5） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:997 (CN2011-ZH PDF) 其它名稱:296-13981-1 |
| IDT74ALVCHR16260APF | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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