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參數(shù)資料
| 型號： | IDT74ALVCH373PG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.65 MM PITCH, TSSOP-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 62K |
| 代理商： | IDT74ALVCH373PG8 |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH373
3.3VCMOSOCTALTRANSPARENTD-TYPELATCHWITH3-STATEOUTPUTS
1
MARCH 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4474/1
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in QSOP, SOIC, SSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for Heavy Loads
IDT74ALVCH373
3.3V CMOS OCTAL
TRANSPARENT D-TYPE
LATCH WITH 3-STATE
OUTPUTS AND BUS-HOLD
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
DESCRIPTION:
This octal transparent D-type latch is built using advanced dual metal
CMOS technology. The ALVCH373 device is particularly suitable for
implementing buffer registers, I/O ports, bidirectional bus drivers, and
working registers. While the latch-enable (LE) input is high, the Q outputs
follow the data (D) inputs. When LE is taken low, the Q outputs are latched
at the logic levels set up at the D inputs.
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide
the capability to drive bus lines without interface or pullup components.
The ALVCH373 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH373 has a “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
1
Q
11
2
OE
1
LE
1
D
C1
1
D
3
TO SEVEN OTHER CHANNELS
相關(guān)PDF資料 |
PDF描述 |
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| IDT74ALVCH373SO8 | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74ALVCH374PG | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74ALVCHR162245PA8 | ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| IDT74ALVCHR162269APF | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| IDT74ALVCHR162269APAG | ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT74ALVCHR162245PA | 制造商: 功能描述: 制造商:Integrated Device Technology Inc 功能描述: 制造商:undefined 功能描述: |
| IDT74ALVCHR162245PA/TR | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74ALVCHR162245PAG | 功能描述:IC TRANSCVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74ALVCHR 標(biāo)準(zhǔn)包裝:47 系列:74LVX 邏輯類型:緩沖器/線路驅(qū)動器，非反相 元件數(shù):4 每個元件的位元數(shù):1 輸出電流高，低:4mA，4mA 電源電壓:2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:管件 |
| IDT74ALVCHR162245PAG8 | 功能描述:IC TRANSCVR TRI-ST 16BIT 48TSSOP RoHS:是 類別:集成電路 (IC) >> 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器 系列:74ALVCHR 標(biāo)準(zhǔn)包裝:1 系列:74LVCR 邏輯類型:收發(fā)器，非反相 元件數(shù):1 每個元件的位元數(shù):8 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-VQFN-EP（3.5x4.5） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:997 (CN2011-ZH PDF) 其它名稱:296-13981-1 |
| IDT74ALVCHR16260APF | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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